Liquid metal circuits and methods of making the same

ABSTRACT

A high-throughput method of manufacturing a liquid metal circuit may include applying a liquid metal to an alloying metal pattern on an elastic substrate to form the liquid metal circuit. The elastic substrate may have a surface area greater than 1 square inch. The liquid metal circuit may include a plurality of liquid metal circuits on the elastic substrate. Methods of using the liquid metal circuit are also described.

CROSS REFERENCE TO RELATED APPLICATION

This application claims the benefit of U.S. Provisional Application No.62/919,401, filed Mar. 12, 2019, the entire contents of which isincorporated herein by reference.

GOVERNMENT RIGHTS

This invention was made with government support under grant numbersN00014-16-2301 and N00014-14-10778 awarded by the Office of NavalResearch (ONR) and N000141812843 awarded by the National OceanographicPartnership Program (NOPP). The U.S. government has certain rights inthe invention.

TECHNICAL FIELD

This disclosure generally relates to liquid metal circuits, and inparticular, soft, stretchable and/or deformable electronics as well asmethods of making and using the same.

BACKGROUND

Soft electronics generally refers to flexible and stretchable devices(e.g., circuits and circuit components) that may be bent, stretched, ortwisted without losing mechanical and electrical functionality. As such,these devices may have the capability to match the elasticity ofbiological tissue and conform to the human body without hinderingmotion. Thanks to these capabilities, soft electronics have recentlydrawn considerable attention as a complementary technology toconventional rigid electronics for a broad range of emergingapplications from wearable computing to soft robotics, for example. Suchsoft electronics may provide increased robustness and better mechanicalimpedance matching with the host material or structure. For instance,they may be integrated into clothing or mounted on the skin withoutconstraining natural body motion or causing discomfort.

A conventional approach for making stretchable electronics may be tocreate microfluidic channels within an elastomer matrix with aliquid-metal. Gallium-based liquid metal circuits may offer certainadvantages over alternative approaches. However, stretchable electronicsbased on soft-elastomers embedded with percolating networks of rigidmetallic particles, carbon allotropes, and/or conductive polymers maysuffer from low conductivity (e.g., three orders of magnitude lower thanmetals) or poor electromechanical properties. Micro/nanoscale geometriesof ultrathin conductive elements (e.g., serpentine and “wavy”electronics) represent a promising alternative that achieves stretchablefunctionality through flexure or twisting on a prestrained elastomersubstrates. However, obtaining stretchability with deterministicarchitectures may require conductive traces to be patterned intospecific geometries (e.g., prebuckled waves, planar serpentines) thatare only deformable in certain directions. Moreover, the power-carryingcapacity of these traces may be severely limited when the conductortraces are ultrathin (e.g., smaller than 200 nanometers).

Accordingly, it may be desirable to manufacture multifunctional andsoft, stretchable and deformable electronics having a high level ofreproducibility and throughput.

BRIEF DESCRIPTION OF THE FIGURES

The devices and processes described herein may be better understood byconsidering the following description in conjunction with theaccompanying drawings; it being understood that this disclosure is notlimited to the accompanying drawings.

FIG. 1 illustrates a method of making a liquid metal circuit accordingto the present invention.

FIG. 2 illustrates methods of making a liquid metal circuit according tothe present invention: (a) liquid metal jetting, (b) liquid metal layerformed by rolling with a roller or squeegee, (c) liquid metal dipping inbath.

FIG. 3 illustrates a relationship between deposited liquid metal peakheight and the alloying layer geometry and dipping withdrawal speed of amethod of making a liquid metal circuit according to the presentinvention.

FIG. 4 illustrates a self-healing liquid metal circuit according to thepresent invention.

FIG. 5 illustrates a plot of resistance (milliohm) v. time (days) for aliquid metal circuit according to the present invention.

FIG. 6 illustrates a liquid metal circuit lacking HCl treatment and aliquid metal circuit having HCl treatment according to the presentinvention.

FIG. 7 illustrates normalized resistance of tensile strength v. strainfor a liquid metal circuit lacking HCl treatment (left) and a liquidmetal circuit having HCl treatment according to the present invention(right).

FIG. 8 illustrates a method of making a liquid metal circuit accordingto the present invention.

FIG. 9 illustrates a tensile test specimen of a liquid metal circuitaccording to the present invention.

FIG. 10 illustrates a liquid metal circuit lacking HCl treatment and aliquid metal circuit having HCl treatment according to the presentinvention.

FIG. 11 illustrates results of self-alignment quantification of liquidmetal circuits according to the present invention.

FIG. 12 illustrates results of tensile testing of liquid metal circuitsaccording to the present invention.

FIG. 13 illustrates a method of making a liquid metal circuit accordingto the present invention.

FIG. 14 illustrates component package architectures and functional ofliquid metal circuits according to the present invention.

FIG. 15 illustrates a method of making a liquid metal circuit accordingto the present invention.

FIG. 16 illustrates liquid metal circuits according to the presentinvention and characteristics thereof.

FIGS. 17-19 illustrate average peak height v. withdrawal speed, linewidth, and dipping orientation of liquid metal circuits according to thepresent invention.

FIG. 20 illustrates characteristics of methods of making a liquid metalcircuit according to the present invention.

FIG. 21 illustrates a system and method of making a liquid metal circuitaccording to the present invention.

FIG. 22 illustrates liquid metal circuits according to the presentinvention.

FIG. 23 illustrates a manual pick-and-place setup useful for method ofmaking a liquid metal circuit according to the present invention

FIG. 24 illustrates a method of making a liquid metal circuit accordingto the present invention.

FIG. 25 illustrates liquid metal circuits according to the presentinvention and characteristics thereof.

FIGS. 26 and 27 illustrate characteristics of liquid metal circuitsaccording to the present invention.

FIG. 28 illustrates liquid metal circuits according to the presentinvention and characteristics thereof.

FIG. 29 illustrates characteristics of liquid metal circuits accordingto the present invention.

FIG. 30 illustrates an electrical interface test specimen of liquidmetal circuits according to the present invention.

FIG. 31 illustrates a self-alignment test specimen of liquid metalcircuits according to the present invention.

FIGS. 32 and 33 illustrate an integrated circuit comprising a liquidmetal circuit according to the present invention.

FIGS. 34 and 35 illustrate ruptures at the interface of a liquid metaland lead-component interface.

FIG. 36 illustrates characteristics of methods of making a liquid metalcircuit according to the present invention.

FIG. 37 includes Table A.1 describing ANOVA table for average peakheight variation; and FIG. 38 includes Table A.2 describing ANOVA tablefor peak height variation.

FIG. 39 includes Table A.3 describing estimated slopes for thelogarithmic relationship between withdrawal speed and average peakheight for withdrawal speeds larger than 10 mm/s; and

FIG. 40 includes Table A.4 describing average peak height to widthratios for constant liquid metal deposition height region where thewithdrawal speed is smaller than 10 mm/s for 0 and 45 degreeorientations.

DETAILED DESCRIPTION

This disclosure generally describes soft, stretchable and/or deformableelectronics and integrated electronic circuits as well as methods ofmaking and using the same. It is understood, however, that thisdisclosure also embraces numerous alternative features, aspects, andadvantages that may be accomplished by combining any of the variousfeatures, aspects, and/or advantages described herein in any combinationor sub-combination that one of ordinary skill in the art may finduseful. Such combinations or sub-combinations are intended to beincluded within the scope of this disclosure. As such, the claims may beamended to recite any features, aspects, and advantages expressly orinherently described in, or otherwise expressly or inherently supportedby, this disclosure. Further, any features, aspects, and advantages thatmay be present in the prior art may be affirmatively disclaimed.Accordingly, this disclosure may comprise, consist of, consistessentially or be characterized by one or more of the features, aspects,and advantages described herein. As used herein, the term “and/or”includes any and all combinations of one or more of the associatedlisted items.

All numerical quantities stated herein are approximate, unless statedotherwise. Accordingly, the term “about” may be inferred when notexpressly stated. The numerical quantities disclosed herein are to beunderstood as not being strictly limited to the exact numerical valuesrecited. Instead, unless stated otherwise, each numerical value statedherein is intended to mean both the recited value and a functionallyequivalent range surrounding that value. At the very least, and not asan attempt to limit the application of the doctrine of equivalents tothe scope of the claims, each numerical value should at least beconstrued in light of the number of reported significant digits and byapplying ordinary rounding techniques. Notwithstanding theapproximations of numerical quantities stated herein, the numericalquantities described in specific examples of actual measured values arereported as precisely as possible. Any numerical values, however,inherently contain certain errors necessarily resulting from thestandard deviation found in their respective testing measurements.

All numerical ranges stated herein include all sub-ranges subsumedtherein. For example, a range of “1 to 10” or “1-10” is intended toinclude all sub-ranges between and including the recited minimum valueof 1 and the recited maximum value of 10 because the disclosed numericalranges are continuous and include every value between the minimum andmaximum values. Any maximum numerical limitation recited herein isintended to include all lower numerical limitations. Any minimumnumerical limitation recited herein is intended to include all highernumerical limitations.

All compositional ranges stated herein are limited in total to and donot exceed 100 percent (e.g., volume percent or weight percent) inpractice. When multiple components may be present in a composition, thesum of the maximum amounts of each component may exceed 100 percent,with the understanding that, and as those skilled in the art wouldreadily understand, that the amounts of the components may be selectedto achieve the maximum of 100 percent.

In the following description, certain details are set forth in order toprovide a better understanding of various features, aspects, andadvantages the invention. However, one skilled in the art willunderstand that these features, aspects, and advantages may be practicedwithout these details. In other instances, well-known structures,methods, and/or techniques associated with methods of practicing thevarious features, aspects, and advantages may not be shown or describedin detail to avoid unnecessarily obscuring descriptions of other detailsof the invention.

The terminology used herein is for the purpose of describing particularexamples only and is not intended to be limiting. As used herein, thesingular forms “a”, “an”, and “the” may be intended to include theplural forms as well, unless the context clearly indicates otherwise.The terms “comprises”, “comprising”, “including”, “having”, and“characterized by”, are inclusive and therefore specify the presence ofstated features, elements, compositions, steps, integers, operations,and/or components, but do not preclude the presence or addition of oneor more other features, integers, steps, operations, elements,components, and/or groups thereof. Although these open-ended terms areto be understood as a non-restrictive term used to describe and claimvarious aspects set forth herein, in certain aspects, the term mayalternatively be understood to instead be a more limiting andrestrictive term, such as “consisting of” or “consisting essentially of”Thus, for any given embodiment reciting compositions, materials,components, elements, features, integers, operations, and/or processsteps, described herein also specifically includes embodimentsconsisting of, or consisting essentially of, such recited compositions,materials, components, elements, features, integers, operations, and/orprocess steps. In the case of “consisting of”, the alternativeembodiment excludes any additional compositions, materials, components,elements, features, integers, operations, and/or process steps, while inthe case of “consisting essentially of”, any additional compositions,materials, components, elements, features, integers, operations, and/orprocess steps that materially affect the basic and novel characteristicsare excluded from such an embodiment, but any compositions, materials,components, elements, features, integers, operations, and/or processsteps that do not materially affect the basic and novel characteristicscan be included in the embodiment.

Any method steps, processes, and operations described herein are not tobe construed as necessarily requiring their performance in theparticular order discussed or illustrated, unless specificallyidentified as an order of performance. It is also to be understood thatadditional or alternative steps may be employed, unless otherwiseindicated.

When a component, element, or layer is referred to as being “on”,“engaged to”, “connected to”, or “coupled to” another element or layer,it may be directly on, engaged, connected or coupled to the othercomponent, element, or layer, or intervening elements or layers may bepresent. In contrast, when an element is referred to as being “directlyon”, “directly engaged to”, “directly connected to”, or “directlycoupled to” another element or layer, there may be no interveningelements or layers present. Other words used to describe therelationship between elements should be interpreted in a like fashion(e.g., “between” versus “directly between”, “adjacent” versus “directlyadjacent”, etc.).

Although the terms first, second, third, etc. may be used herein todescribe various steps, elements, components, regions, layers and/orsections, these steps, elements, components, regions, layers and/orsections should not be limited by these terms, unless otherwiseindicated. These terms may be only used to distinguish one step,element, component, region, layer or section from another step, element,component, region, layer or section. Terms such as “first”, “second”,and other numerical terms when used herein may not imply a sequence ororder unless clearly indicated by the context. Thus, a first step,element, component, region, layer or section discussed below may betermed a second step, element, component, region, layer or sectionwithout departing from the teachings herein.

Spatially or temporally relative terms, such as “before”, “after”,“inner”, “outer”, “beneath”, “below”, “lower”, “above”, “upper”, and thelike, may be used herein for ease of description to describe one elementor feature's relationship to another element(s) or feature(s) asillustrated in the figures. Spatially or temporally relative terms maybe intended to encompass different orientations of the device or systemin use or operation in addition to the orientation depicted in thefigures. As used herein, “top” means furthest away from the substrate,while “bottom” means closest to the substrate. Where a first layer isdescribed as “disposed over”, “provided over”, or “deposited over” asecond layer, the first layer is disposed further away from substrate.There may be other layers between the first and second layer, unless itis specified that the first layer is “in contact with”, “disposed on”,“provided on”, or “deposited on” the second layer.

The present invention is directed to techniques to providemultifunctional and practical soft and stretchable electronics withhigher level of reproducibility and throughput, which may be referred toas scalability or high-rate manufacturing or rapid manufacturing.

The techniques may be characterized as an overall high-throughputmanufacturing approach for liquid metal based soft and stretchablecircuits with and without integrated solid integrated circuit (IC)chips. Since the techniques may be integrated with conventionalmicrofabrication processes used for microelectronics, a very highthroughput may be established. The techniques may also be applied at thewafer scale, thereby enabling simultaneous fabrication of a very largenumber of devices.

The present invention is directed to methods to manufacture liquid metal(LM) traces, created by coating non-liquid-metal traces, patterns, orsurfaces through metallic alloying, on elastic (also referred to as softand flexible) substrates.

The present invention is directed to LM coated metallic traces that mayprovide increased robustness of flexible circuits and stretchablecircuits relative to conventional circuits. Without wishing to be boundto any particular theory, it is believed that the failure of flexiblecircuits may be due to the mechanical fracturing of the thin conductivetraces. While capable of enduring modest bending curvatures, limitationsarise from material properties (e.g., low yield strains) and geometricdesign (i.e., particularly the neutral axis placement and thickness).Cracks in the conductive material may form due to excessivebending/stretching or due to fatigue from cyclic stresses. By coatingthe metal traces with LM, the circuit may acquire a self-healingproperty. Referring to FIG. 4 , when the solid metal trace fractures,the void may be filled with LM, maintaining the conductivity andfunctionality of the system.

Stretchable circuits created with deterministic geometries of thin filmmetals on elastomers may also experience failure due to the materialproperties of the conductive traces. Again, the traces, despite beingbuckled or wavy, may be coated with liquid metal via alloyed wetting.While still limited in stretch by the geometric constraints of thedeterministic structures, self-healing via the flow of LM may increasethe overall robustness. The mostly constant electrical conductivity as afunction of stretch may be maintained under this design. Even with thecoating of LM, the inextensibility of the thin film metal traces maymaintain a relatively constant overall length and cross-sectionregardless of strain.

The present invention is directed to methods of liquid metal dip-coatingto deposit LM onto patterned metallic traces on a substrate.

The present invention is directed to methods to integrate LM-basedcircuits with traditional electronic materials and components forincreased functionality of flexible and stretchable circuits. Thecombination of conventional rigid electronics, flexible and stretchableelectronics with deterministic geometries and LM-based electronics on asingle flexible circuit may provide the merits and functionality of eachsystem on a single device. Rigid electronic component may be used toprovide functionalities (e.g., power management), a sensing modalities(e.g., orientation, range, acceleration, magnetic field strength, speed,pressure, altitude, deformation, humidity sensing), communication (e.g.,radio frequency (RF), WiFi, BLUETOOTH), and/or on-board digitalprocessing. Flexible and stretchable electronics may provide soft andstretchable sensing (e.g., pressure, strain, tactile), communications(e.g., antennas), analog circuit elements (e.g., capacitors, resistors,inductors and diodes), and/or soft and stretchable interconnects (i.e.,wiring) among the rigid and flexible elements to maintain electricalfunctionality under mechanical deformation (e.g. bending, twisting,stretching or compression).

The present invention is directed to methods to manufacture LMinterconnect interfaces having decreased electrical contact resistancebetween circuit and rigid component pins. The method may utilize a vaporstate reduction agent (e.g., HCl vapor) to initiate soldering andself-alignment of the component pins with respect to LM pads. This mayincrease the contact area at the interface between component pins and LMinterconnects (see FIG. 6 ) resulting in a low electrical contactresistance (see FIG. 5 ) similar to a conventional solder contacts.

The present invention is directed to LM interconnects having repeatable,reproducible and stable interface between circuit and rigid componentpins and methods of making and using the same. Referring to FIG. 5 , themethod may utilize the application of a vapor state reduction agent tomake the electrical contact repeatable, reproducible and stable overtime similar to a conventional solder contact. Referring to FIG. 7A, theapplication of a vapor state reduction agent may increase the maximumstrain at failure under tensile loading for LM circuits containing arigid electronic component. For example, the maximum strain at failuremay be measured as 82.6±13.3% for HCl treated samples and 57.7±7.9% fornon-treated samples. Referring to FIG. 7B, the application of a vaporstate reduction agent may increase the reliability of LM circuits havinga rigid electronic component that operate under cyclic loading. Each ofthe three HCl-treated samples completed the 2000-cycle test withoutfailure. In contrast to HCl-treated samples, only one non-treated samplecompleted the 2000-cycle test out of seven samples. Four samples failedwithin the first 20 cycles (not shown in FIG. 7B), one failed at the47th cycle and another one failed at the 374th cycle.

The present invention is directed to LM deposited on ultrathin(non-liquid) metallic traces through metallic alloying for creatingfully stretchable circuits as well as methods of making the same. Thepresent invention may be an alternative to fabricating stretchablecircuits. The method according to the present invention may compriseusing a substrate having extremely thin metal (e.g., 10 nanometer to 1micrometer thickness) on an elastomer or other flexible substrate. Themetal traces may act as a sacrificial wetting layer. LM deposited on themetallic wetting layer may act as the primary conductive component.During stretching, the wetting layer may be fractured or lose itsmaterial integrity.

The present invention is directed to methods for patterning LM-coatedmetallic circuits to enable a range of feature sizes also used inconventional electronics and microelectronics. The LM may be coated onexisting metal traces such that the dimensions may be determined by thesubstrate fabrication methods, including, but not limited to,photolithography, wet chemical etching, plasma etching, and laserpatterning.

The present invention may comprise a series of directed methods forpatterning LM-coated metallic circuits that mitigate excess LM or LMoxide residue. Without wishing to be bound to any particular theory, andby taking advantage of the high surface tension of its oxide-free state,eutectic gallium-indium (EGaIn) or gallium-indium-tin (Galinstan) are LMalloys that may be selectively adhered to patterned metallic tracesthrough alloyed wetting. The free surface of the substrate may remainfree of LM and oxide contamination during fabrication. This mayalleviate electrical shorting and breakdown issues. In general, the LMalloys may comprises metal and metal alloys that are liquid below theirmelting points, e.g., liquid at room temperature.

According to the present invention, a high-throughput method ofmanufacturing a liquid metal circuit may generally comprise applying aliquid metal to an alloying metal pattern on an elastic substrate toform the liquid metal circuit, wherein the high-throughput method ofmanufacturing the liquid metal circuit is characterized by at least oneof wherein the elastic substrate comprises a surface area greater than 1square inch, such as greater than 10 square inches, greater than 100square inches, greater than 144 square inches, greater than 256 squareinches and greater than 400 square inches; and wherein the liquid metalcircuit comprises a plurality of liquid metal circuits on the elasticsubstrate, such as greater than 1, greater than 10, greater than 100,greater than 250, greater than 500, and greater than 1000.

The method may comprise fabricating the alloying metal pattern using atleast one of photolithography, stencil lithography, chemical etching,and laser micromachining.

The method may comprise providing a patterned adhesive surface on asurface of the elastic substrate by at least one of chemical surfacemodification, mechanical surface modification. The method may compriseapplying an adhesion material in a pattern to a surface of the elasticsubstrate by at least one of photolithography, stencil lithography,sputter deposition, physical vapor deposition, and chemical vapordeposition to provide the patterned adhesive surface.

The method may comprise applying an alloying metal material to thepatterned adhesive surface by at least one of photolithography, stencillithography, chemical etching, laser micromachining, chemical surfacemodification of the elastic substrate, and mechanical surfacemodification of the elastic substrate, wherein the alloying metalmaterial adheres to the patterned adhesion surface to form the alloyingmetal pattern on the elastic substrate.

The method may comprise exposing the alloying metal pattern to a liquidmetal, such as rolling the liquid metal, jetting the liquid metal,brushing the liquid metal, spray deposition, and dipping in a reservoircomprising the liquid metal. For example, the method may compriseliquid-metal dip coating of the alloying metal pattern into a reservoircomprising the liquid metal. The reservoir may comprise the liquid metaland an oxide-removing solvent comprising sodium hydroxide, hydrochloricacid, and mixtures thereof. The method may comprise agitating at leastone of the reservoir, the liquid metal, and the elastic substrate whenthe alloying metal pattern is exposed to the liquid metal.

The alloying metal pattern may be immersed into and removed from thereservoir at a dipping orientation independently selected from up to 90degrees with respect to the alloying metal pattern on a surface of theelastic substrate. The dipping orientation may be from 0-90 degrees,greater than zero up to 90 degrees, 0-45 degrees, and 45-90 degrees. Thedipping orientation for one or more of the at least one linear portionof the liquid metal trace may be the same or different. For example, theliquid metal trace may comprise a plurality of linear portions eachhaving a dipping orientation independently selected from 0-90 degrees.For the example, the dipping orientation during immersion may be 0degrees and the dipping orientation during removal may be 90 degrees, orvice versa. The elastic substrate may comprise at least one liquid metaltrace having at least one linear portion. A dipping angle may comprisethe angle between the at least one linear portion and an planeperpendicular to a surface of the liquid metal.

According to the present invention, a liquid metal circuit may compriseat least one liquid metal trace having a height to width ratio up to 1,wherein the liquid metal trace comprises the liquid metal. The height towidth ratio may have a maximum value of 0.1, 0.2, 0.25, 0.3, 0.4, 0.5,0.6, 0.7, 0.75, 0.8, 0.9, 0.95, 0.98, 0.99, and 1.0. The height to widthratio may have a minimum value of 0.1, 0.2, 0.25, 0.3, 0.4, 0.5, 0.6,0.7, 0.75, 0.8, 0.9, 0.95, 0.98, 0.99, and 1.0. The height to widthratio may be 0.1-1, 0.25-1, 0.5-1, 0.75-1, 0.1-0.5, 0.25-0.75, less than0.5, and less than 0.25.

According to the present invention, the adhesion material may compriseat least one of chromium, titanium and nickel, the alloying material maycomprise at least one of copper, gold, platinum, palladium, tin, zinc,and iridium, and the liquid metal may comprise at least one of gallium,indium, and tin.

According to the present invention, the liquid metal circuit maycomprise a self-healing liquid metal circuit.

An integrated circuit may comprise the liquid metal circuit manufacturedaccording to a high-throughput comprising: applying a liquid metal to analloying metal pattern on an elastic substrate to form the liquid metalcircuit, wherein the high-throughput method of manufacturing the liquidmetal circuit is characterized by at least one of wherein the elasticsubstrate comprises a surface area greater than 1 square inch, such asgreater than 10 square inches, greater than 100 square inches, greaterthan 144 square inches, greater than 256 square inches and greater than400 square inches; and wherein the liquid metal circuit comprises aplurality of liquid metal circuits on the elastic substrate, such asgreater than 1, greater than 10, greater than 100, greater than 250,greater than 500, and greater than 1000.

A high-throughput method of manufacturing a liquid metal circuit maygenerally comprise forming a liquid metal trace on an elastic substrateby exposing an alloying metal pattern on the elastic substrate to aliquid metal; positioning a microelectronic component proximate to theliquid metal trace; and exposing the microelectronic component and theliquid metal trace to a solvent gas to remove oxide from at least one ofthe microelectronic component and the liquid metal trace, wherein themicroelectronic component is substantially aligned with the liquid metaltrace after exposing the microelectronic component and the liquid metaltrace to the solvent gas; wherein the high-throughput method ofmanufacturing the liquid metal circuit is characterized by at least oneof wherein the elastic substrate comprises a surface area greater than 1square inch, such as greater than 10 square inches, greater than 100square inches, greater than 144 square inches, greater than 256 squareinches and greater than 400 square inches; and wherein the liquid metalcircuit comprises a plurality of liquid metal circuits on the elasticsubstrate. The solvent gas may comprise at least one of hydrochloricacid, sodium hydroxide, sulfuric acid, and potassium hydroxide. Themicroelectronic component may comprise a vertical distance between themicroelectronic component and the liquid metal trace that is reducedafter exposing the microelectronic component and the liquid metal traceto the solvent gas. For example, a first vertical distance between themicroelectronic component and the liquid metal trace prior to exposingthe microelectronic component and the liquid metal trace to the solventgas may be greater than a second vertical distance between themicroelectronic component and the liquid metal trace after exposing themicroelectronic component and the liquid metal trace to the solvent gas.

A high-throughput method of manufacturing a liquid metal circuit maygenerally comprise liquid-metal dip coating an alloying metal pattern onan elastic substrate into a reservoir comprising a liquid metal, whereinthe high-throughput method of manufacturing the liquid metal circuit ischaracterized by at least one of wherein the elastic substrate comprisesa surface area greater than 1 square inch; and wherein the liquid metalcircuit comprises a plurality of liquid metal circuits on the elasticsubstrate. The alloying metal pattern may comprise at least one ofcopper, gold, platinum, palladium, tin, zinc, and iridium, and theliquid metal comprises at least one of gallium, indium, and tin. Theliquid metal circuit comprises a liquid metal trace having a height towidth ratio up to 1, such as 0.1-1, 0.25-1, 0.5-1, 0.75-1, 0.1-0.5,0.25-0.75, less than 0.5, less than 0.25.

Introduction

Liquid metal based designs may have the advantage of extreme mechanicalstretchability and flexibility limited by the substrate not by the LM(up to 1000% strain) while maintaining high conductivity. Gallium andGa-based LM alloys, such as eutectic Ga-ln (EGaln; 75% Ga and 25% In, byweight) and Ga-ln-Sn (Galinstan; 68% Ga, 22% In, 10% Sn), may beincorporated into elastomers and preserve their elastic properties atall length scales and in all loading conditions without requiringspecialized geometries. The room temperature liquid-metals commonly usedin these devices may include a binary eutectic alloy of gallium andindium (EGaln) (T_(m) about 15.5° C.) and a ternary alloy ofgallium-indium-tin (Galinstan) (T_(m) about −19° C.). The popularity ofthese gallium-based liquid alloys over other liquid-metals may be due totheir low-toxicity and negligible vapor pressure. EGaIn and Galinstanmay function as intrinsically stretchable and deformable conductors thatare not subject to the limitations of conductive polymers ordeterministic architectures. As such, LM-based electronics may provide aunique combination of metallic conductivity (σ=3.4×10⁶S/m, 1/20^(th) ofCu) and elastomeric deformability.

Methods for EGaIn and Galinstan pattern fabrication may includedirect-writing, injection, inkjet printing, laser patterning, contactprinting, imprinting, selective wetting, screen printing, spraypainting, and reductive patterning. Microfluidic channels of EGaInembedded in a soft elastomer, e.g., polydimethylsiloxane (PDMS), orother soft and elastic materials (e.g., spandex, natural latex, etc.)may function as highly stretchable wires and passive circuit elements.Such architectures have also been used for diodes and memristors,deformation sensors, and mechanically or electrochemically tunableantennas. There has also been increasing focus on the direct andindirect integration of integrated circuits (“IC”) chips and othermicroelectronics to form multifunctional stretchable circuit assemblies.Conventional techniques to provide LM-based electronic may lack scalablemanufacturing techniques that may be integrated in the standard processflow of traditional lithographic microfabrication techniques andeffective electrical interfaces between liquid metal traces andconventional rigid microelectronics (such as integrated circuits (IC) orsurface-mount device (SMD) components) may be desirable to createmultifunctional and practical soft and stretchable electronics with highlevel of reproducibility and throughput.

Methodology

A method to manufacture liquid metal circuits with or without integratedIC or SMD components, in particular, soft, stretchable and deformableelectronics, may generally comprise at least one of (1) patterningmetallic wetting layers on elastic (i.e., flexible/stretchable/soft)substrates to form circuit, mounting pad and device designs, usingvarious processes, including but not limited to photolithography,stencil lithography, wet etching, plasma etching, and laser patterningand micromachining; (2) selective deposition of gallium-based liquidmetals (LM) on the wetting layers through alloying using variousprocesses, including but not limited to dip-coating, stencilprinting/lithography, spray deposition or rolling processes; (3)interfacing and integration of rigid components to the circuit using avapor form of a reduction agent (also referred to as solvent vapor),such as hydrogen chloride (HCl) vapor, to cause improved electricalconnection and self-alignment, and (4) sealing the entire hybrid flexcircuitry into an elastic medium. An overview of the fabrication methodis illustrated in FIG. 1 .

Substrate Preparation

As shown in FIG. 1A, a method to manufacture integrated liquid metalcircuits may comprise patterning of wetting layers on flexiblesubstrate. The wetting layers patterned on the substrate may retain thetreated LM by alloying. The surfaces lacking such patterns of analloying metal, therefore, would not be wetted by the bulk LM due to itshigh surface tension against non-metal surfaces.

The wetting layer material may alloy with oxide-free LM. Sample wettinglayer materials may include, but are not limited to, Cu, Ag, Au, Ga, In,Sn, and Zn. Cu, Ag, Au and Sn may also be used in printed circuit board(PCB) and flex-PCB manufacturing. The wetting layer may also be referredto an alloying layer

The elastic substrate may be characterized by at least one of theabilities and/or characteristics of stretchability, flexibility,bendability, softness, and twistability. These materials may include,but are not limited to, elastomers (such as polyurethanes (PU), siliconerubbers) and flexible plastics (such as polyimide (PI), polyethylenenaphthalate (PEN), polyether ether ketone (PEEK), polyester (PET),polyetherimide (PEI)), flexible resins, and natural rubber.

Patterning of metal wetting layers may be achieved through singly or acombination of various techniques, including but not limited to:conventional methods such as photolithography and wet etching forfeature sizes as small as less than 1 micrometer up to 10 cm;microcontact printing; electronic UV laser patterning of thin films ofmetal coated (e.g., sputtered or evaporated) on UV transparent/resistantmaterial, e.g., polydimethylsiloxane, which remains undamaged under lowpowered UV lasers; thin films of metal, however, may be patternable atthis level, allowing clean fabrications of wetting layers, e.g.,features down to 30 micrometers may be achieved, limited by the laserbeam width and the mechanical resolution of the system; spray coatingand stencil printing; and methods to create wetting layers withdeterministic morphologies.

Liquid Metal Application

The method to manufacture integrated liquid metal circuits may comprisetreating the LM with a reduction agent to remove its oxide skin. The LMalloy may comprise Eutectic gallium-indium alloy (EGaln) and/orgallium-indium-tin (Galinstan). The reduction agent may be in solid,liquid or vapor phase as well as in the form of aqueous solution. Inorder to achieve high resolution, the reactivity of reduction agent maybe absent or very low against the wetting layer patterns and thesubstrate but may be able to reduce the oxide skin of the LM. Thereduction agent may comprise aqueous solutions or vapor phase ofpotassium hydroxide (KOH), sodium hydroxide (NaOH), hydrochloric acid(HCl). A person having ordinary skill in the art may appreciate thatwhen this approach is applied in a controlled, oxygen-free environment,the reduction agent may be eliminated completely.

Before the deposition of LM to the wetting layers, theconnections/patterns or other regions of the substrate where deposits ofLM are not desired may be masked to avoid wetting layer-LM contact. Thismask may be patterned via photolithography for size ranges down to 0.7micrometers. Mask material may not react with the reduction agent,substrate material, wetting layer material and/or the LM itself. Maskmaterials may comprise at least one of negative photoresists andpositive photoresists. When LM is deposited to the entire circuitry, nomask may be required.

As shown in FIG. 1B, the method to manufacture integrated liquid metalcircuits may comprise applying oxide-free LM to the preferred wettinglayer patterns for the deposition. LM deposition to the patterns may beachieved by ensuring a physical contact between wetting layer patternsand the treated liquid metal. Techniques to apply the oxide-free LMinclude, but are not limited to, the following: rolling or jettingtreated LM on wetting layer patterns; rolling with a compliant (rubber)roller or squeegee; and dipping patterned substrate into treated LMbath.

FIG. 2A illustrates rolling or jetting treated LM on wetting layerpatterns. A drop of treated LM may be rolled over the surface usinggravity, jetted via a dropper or an airbrush, or by outside manipulation(e.g., by manual probe). FIG. 2B illustrates rolling with a compliant(rubber) roller or squeegee. FIG. 2C illustrates dipping a patternedsubstrate into a treated LM bath. While dipping, the LM bath may beagitated, stirred, or shaken to cause contact between LM and wettinglayer.

Without wishing to be bound to any particular theory, dip-coatingparameters, including but not limited to, the insertion speed into thebath, the withdrawal speed from the bath, the dipping orientation,and/or the wetting layer geometry, may affect the amount of LM depositedon the wetting layer. FIG. 3 (Left) shows the relationship between peakdeposited height vs withdrawal speed, wetting layer width, and wettinglayer material. As shown in FIG. 3 , there is no significant differencein deposited liquid metal height observed between copper (Cu) and gold(Au) as wetting layer materials. FIG. 3 , (Right) shows the relationshipbetween withdrawal speed and deposited peak liquid metal height (h_(p))in a finer scale. Without wishing to be bound to any particular theory,assuming the surface tension (γ) and the viscosity (μ) of the liquid areknown, the scaling law describing the relationship between withdrawalspeed (U) and wetting layer width (W) may be written as follows:

$\begin{matrix}{h_{p} \propto {W\left( \frac{\mu U}{\gamma} \right)}^{1/3}} & (1)\end{matrix}$

After LM deposition, the patterns may be rinsed first with deionized(Dl) water and then with isopropyl alcohol (IPA) and dried to clean theexcess reduction agent left on the surface. During rinsing and cleaningof the reduction agent, the oxide layer may grow back on LM patternsallowing them to keep their patterned shape. The oxide layer may providethe patterned LM with structural integrity so that the patterns holdtheir shape.

When a mask layer is used, the mask layer may be removed with a solventthat does not significantly damage the patterned and coated conductivetraces. The solvent may comprise aqueous solutions or vapor phase ofpotassium hydroxide (KOH), sodium hydroxide (NaOH), hydrochloric acid(HCl), isopropyl alcohol (IPA), AZ® developer (Microchemicals GmbH,Germany), and other solvents that reduce or prevent oxidation ofgallium-indium without causing a chemical reaction with it.

Component Placement and Interfacing

Referring to FIG. 1C, the method to manufacture integrated liquid metalcircuits may comprise coupling rigid components including, but notlimited to, integrated circuit (IC) chips, surface mount devices (SMD)and cable connectors, to designated LM-coated pads.

Referring to FIG. 1D, a vapor phase reduction agent may be applied tothe substrate having the rigid components. The application of a reducingagent may create an interface having low electrical contact resistancebetween the rigid component pins and liquid metal interconnects. Thereduction agent may remove the oxide on component pins and LMinterconnects and bring materials in better contact to initiatesoldering between them. Some examples of the reduction agent include,but are not limited to, vapor phase of hydrochloric acid (HCl) andsulfuric acid (H₂SO₄). The reducing agent may dissolve the oxide “skin”covering the liquid metal and thereby cause a dramatic increase in LMsurface. The non-oxidized liquid metal may apply force on the rigidcomponents and cause it to orient in alignment with the LM-coatedcontact pads. In some instances, this behavior may cause self-alignmentof the rigid components.

The patterns may be rinsed with deionized (Dl) water and then isopropylalcohol (IPA) and dried to clean the excess reducing agent and reactionbyproducts from the surface. During rinsing and cleaning of the reducingagent, the oxide layer may grow back on the surface of the patterned LM.The oxide layer may provide the patterned LM with structural integrityso that the patterns may hold their shape.

Referring to FIG. 1E, lastly, the entire hybrid circuit may be sealed ina flexible carrier medium. The elastic carrier medium may becharacterized by at least one of stretchability, flexibility,bendability, twistability, and softness. The elastic carrier medium mayinclude, but are not limited to, elastomers (such as polyurethanes,silicone rubbers), elastic resins, and other synthetic and naturalpolymeric materials.

Alternative Approaches

LM application may also be performed by removing oxide and working in anoxygen-free environment (e.g., argon or nitrogen environment). In suchan environment, the oxide may not grow back and alloying may be enabledwithout continued need for corrosive fluids.

EXAMPLES

The liquid-metal (“LM”) based soft, flexible, and/or stretchableelectronics (LM-based SSEs) and methods of making and using the samedescribed herein may be better understood when read in conjunction withthe following representative examples. The following examples areincluded for purposes of illustration and not limitation.

Example 1

Materials:

The PDMS used in the fabrication of circuits and test samples wasprepared with Sylgard 184 (Dow Corning, USA) using a 10:1 oligomer tocuring agent ratio. A 3% w/w NaOH solution was prepared by diluting 30%w/v NaOH solution (BDH Chemicals) with deionized (DI) water (100%,McMaster-Carr, USA). DI water and isopropyl alcohol (IPA) (2-propanolACS 99.5% min, Alfa Aesar, USA) were used to the clean surface ofsamples after liquid metal deposition and hydrochloric acid (HCl) vaportreatment. Eutectic gallium-indium alloy (EGaIn) was prepared by mixingGa (Gallium Source, USA) and In (Gallium Source, USA) at a 3:1 ratio bymass and heating and homogenizing at 190° C. on a hot plate overnight.The circuit designs were made in CircuitMaker (Altium Limited,Australia). HCl vapor was obtained from a one-gallon bottle of 36% w/waqueous HCl solution (Alfa Aesar, USA).

Fabrication of Tensile Test Specimens:

The geometry of the tensile test specimens conformed to ASTM D412 toconcentrate strain uniformly at the center portion of the geometry. Themold for the specimen had two portions, one portion to prepare thesubstrate and the other for sealing. Two parts were cut from 1.5 mmthick poly(methyl methacrylate) (PMMA) using a carbon dioxide (CO₂)laser system in the shape of a dog bone (dimensions shown in FIG. 9 ).The first component of the mold was prepared by gluing one of the cutparts to an 8 mm thick PMMA plate. Both components of the mold weredrilled to be aligned during sealing. After creating the mold pieces,the substrate portion was treated with a releasing agent (Ease Release200, Reynolds Advanced Materials, USA), and PDMS was poured inside,degassed under vacuum for 30 min, and cured on a hotplate with 65° C.for 10 hours. Next, a 100 nanometer metal alloying layer of copper wassputter deposited (30 W power, 5 mTorr pressure; Perkin-Elmer 8L, USA)on the PDMS substrate along with a 20 nanometer adhesion layer ofchromium (30 W power, 20 mTorr pressure). The circuit design was made inCircuitMaker and patterned into the Cr/Cu layer using a commercialUV-laser based PCB prototyping tool with 0.3 W power and 400 mm/smarking speed. Next, the elastomeric substrate having the copper wettinglayer was immersed into 3% w/w NaOH solution while keeping the substratehorizontal with respect to the bath. Immediately after immersing, 3% w/wNaOH treated liquid metal droplets were applied to cover the wettinglayer by placing/jetting liquid metal droplets on the substrate surfaceusing a dropper. After the liquid metal was deposited onto the patternedcopper circuit, the coated substrate was dipped horizontally into DIwater and IPA to clean residual NaOH and then dried on a hotplate at 60°C. for 10 min. Next, FFC connectors (Amphenol FCI HFWSR-1STE1LF,purchased from Digikey) with FFC cables (Parlex USA LLC 100R5-51B,purchased from Digikey, USA) attached were placed at their designatedplaces. On the test samples with components, a 1/10 W 0603 zero-Ohmresistor (Samsung Electro-Mechanics America Inc, purchased from Digikey,USA) was placed. Next, HCl vapor was applied to the sample surfacesmanually using a dropper. HCl vapor was obtained from 36% w/w aqueousHCl bottle. HCl treated samples were dipped into DI water and IPA andthen dried on a hotplate at 60° C. for 10 min. Then, the samples wereplaced inside the first part of the mold and oxygen plasma treated at 30W for 45 seconds (Plasma Prep 3, SPI, USA) to activate the PDMS surface.Then, the second part of the mold was bolted to the first part, PDMS waspoured, and the sample was degassed under vacuum for 30 min. Finally,the samples were cured on a hotplate at 65° C. for 10 h.

Tensile Testing:

Both tensile testing up to failure and cyclic tensile testing wereperformed on a commercial material testing device (5969 Dual ColumnTesting System, Instron, USA). The tests were conducted on specimenshaving an integrated microelectronic component (zero-ohm resistor) andspecimens lacking a microelectronic component (i.e., LM-only) were alsoused for comparison. During the test, the load-displacement and theelectrical resistance of the samples were measured. FFC connector cablescoming from the samples were connected to a data acquisition board (NIUSB-6002, National Instruments, USA) via a voltage divider circuithaving a known resistor of 560 Ohms to measure the resistance of thesamples during testing. Strain was also measured simultaneously byplacing markers with a pen on the samples and taking the video of thetest with a stationary camera. The videos were processed with a freevideo analysis tool (Tracker v4.96). The loading rate for the testing upto failure was 15 mm/min while the loading frequency for the cyclictesting was 0.1 Hz. The number of cycles applied for cyclic tensile testwas 2000 and the applied strain amplitude was 35% with 5% prestrainapplied to accommodate slacking during testing. As such, each cycleincluded strains between 5% and 40%. The cyclic strain was applied inInstron's preset sawtooth pattern. Acquired data were filtered using amoving average filter of a window size of 100 and plotted using MATLAB(R2016b, MathWorks, USA).

Test Circuits for Electrical Interface Characterization on Rigid PCB:

The circuit design for the electrical interface characterization isshown in FIG. 30 and was made in CircuitMaker software. The design waspatterned using a commercial UV-laser based PCB prototyping system on a0.5 oz single-sided copper laminate (Fab-in-a-box, PulsarProFX USA). Todeposit solder paste or liquid metal only on the component pads, astencil made from laser mask tape (Orange Laser Mask, Ikoniks Imaging,USA) was patterned using the UVLM system to expose only the componentpads. The stencil was then laid down on the patterned PCB. The componentcontact pads were treated with a water-soluble solder flux pen (Kester#2331-ZX, Kester, USA) to remove the thick oxide on the copper pads. Forthe liquid metal deposited PCBs, masked PCB was immersed horizontallyinto 3% w/w sodium hydroxide (NaOH) treated EGaIn resulted in liquidmetal deposition only on the component contact pads, then the mask wasremoved. Next, the PCB was immersed horizontally into DI water and thenIPA to clean the surface. Following that, the PCB was dried on ahotplate at 60° C. for 10 min. Wires were soldered on the wire contactpads where the measurements to be taken using 0.16±0.01 gr commercial 15mil flux core solder (Sn63Pb37 #50/245, Kester, USA). Finally, a 1/10 W0603 zero-Ohm resistor (RC 1608 Samsung Electro-Mechanics America Inc,purchased from Digikey, USA) was aligned and placed on the liquid metalon the component contact pads using a custom-made manual pick and placesetup that contains a vacuum chuck. After the alignment, the componentwas released from a distance of about 500 micrometers from the boardsurface. For the sample sets where HCl vapor was applied, 20 mL HClvapor was applied using a syringe pump (PHD 220, Harvard Apparatus, USA)with a flow rate of 42 mL/min by placing syringe needle on top of thecomponent with a stand-off distance of about 2.5 mm away from the PCB.The HCl vapor deposition setup was placed under a fume hood with 100ft/min flow rate. After HCl vapor treatment, the PCB was immersedhorizontally into DI water and then IPA to clean the surface. Followingthat, the PCB was dried on a hotplate at 60° C. for 10 min. For the PCBswhere solder paste was used as the solder material, solder paste(SMD291AX250T3, Chipquik Inc, USA) was deposited on the componentcontacts. Next, the mask was removed, a 0603 package 1% zero-Ohmresistor was aligned and placed on the liquid metal on the componentcontact pads using a custom made manual pick and place setup thatcontains a vacuum chuck. After the alignment, the component was releasedfrom a distance of 500 micrometers from the contact pads. Next, solderpaste was treated using a commercial reflow oven (T962, SMTHouse,Sweden). Then, wires were soldered on the contact pads where themeasurements will be taken using a 0.16±0.01 gr commercial 15 mil fluxcore solder (Sn63Pb37 #50/245, Kester, USA). Finally, the board wasrinsed with DI water and then with IPA to clean the surface. Followingthat, the PCB was dried on a hotplate at 60° C. for 10 min.

Self-Alignment Test Samples and Data Processing:

The circuit design for the self-assignment study is shown in FIG. 31 andwas made in CircuitMaker. About 2 g of PDMS was poured and cured on a1-inch diameter Si wafer (purchased from Polishing Corp of America, USA)at 65° C. for 10 h. A 20 nanometer chromium layer was sputter coated onPDMS substrate. Then, a 100 nanometer copper layer was sputter coated onchromium layer. The chromium layer may provide adhesion between thecopper and the PDMS. The metal wetting layers were then patterned, andEGaIn was deposited on the wetting layer and the specimens were cleaned.Next, a 1/10 W 0603 zero-Ohm resistor was placed manually on the contactpads. Profilometry measurements (using NewView, Zygo, USA) and top viewphotos of the samples before HCl treatment were taken (usingInfinitefocus, Alicona, Austria). Next, the samples were treated with 2mL HCl vapors using a syringe pump (PHD 220, Harvard Apparatus, USA) ata flow rate of 42 mL/min by placing a syringe needle on top of thecomponent with a stand-off distance of 2.5 mm away from the surface. Theentire HCl vapor deposition setup was placed under a fume hood with a100 ft/min flow rate. After HCl vapor treatment, the circuit was dippedinto DI water and then IPA was used to clean the surface. Followingthat, the circuit was dried on a hotplate at 60° C. for 10 min.Profilometry measurements and top view photos of the samples after HCltreatment were taken. Using profilometry measurements, the height of thegeometric center of the component, roll, and pitch angles relative tothe substrate were computed using the profilometry device's nativesoftware (MetroPro, Zygo, USA). Using the top view microscopy images ofthe samples, yaw angle of the component with respect to component pads,eccentricity of component geometric center with respect to the geometriccenter of the pads in in-plane axes were calculated using a free imageediting software (IrfanView 4.44).

Implementations and Testing of IMU Circuits:

The circuit designs for the sensor demonstrations are shown in FIG. 32and FIG. 33 and were made in CircuitMaker. PDMS was poured and cured onstandard 1 inch×3 inch glass microscope slides (206B2, KarterScientific, USA). Patterning of the Cu wetting layer, liquid metaldeposition, HCl vapor application, and sealing were performed asdescribed below. Sensitive components were placed using custom mademanual pick and place setup (see FIG. 23 ) and passive components wereplaced with the help of a tweezer manually. Referring to FIG. 14D, totest the performance of the first circuit, the circuit was rotated inthree Euler angles manually with and without mechanical deformation, andthe 3-axis linear acceleration, 3-axis angular rotation, and 3-axismagnetic field strength were measured from the IMU. As shown in FIG.14D, in addition, the change in circuit temperature due to contact withthe user was recorded from the temperature sensor. The data from thedigital IMU were transformed into the three Euler angles of absoluteorientation, and those angles were illustrated in MATLAB (R2016b) asrotations on a rectangular block. Similarly, the temperature sensor datawas used to change the color of the animated block in real-time.Referring to FIG. 14C, the performance of the second circuit wasdemonstrated by applying tilt and pitch to the circuit manually with andwithout mechanical deformation, while measuring the gravitationalacceleration from the sensor. Using the measured acceleration signal,the tilt and pitch angles were calculated, and the tilt and pitch angleswere used to move an animated block in MATLAB (R2016b) in real-time.Data coming from the circuits were acquired using a microcontrollerboard (Arduino Due, Arduino, USA) and processed and plotted in MATLAB inreal-time. The goniometers (ANT 20G-90 and ANT 20G-50, Aerotech, USA)used were rotated with constant speed of 2 degree/second and 0.5degree/second, respectively, between 0° and 5° and 0° and −5° in pitchand roll angles. As shown in FIG. 14E, the sample circuits tested undertensile loading up to failure had a thickness of 1.9±0.05 mm.

Metallurgical Sample Preparation:

EGaIn treated KXTC9-2050 analog accelerometer chip and MPU9250 digitalIMU chips were salvaged from prepared LM-based circuits after 6 months.The excess EGaIn was thoroughly cleaned from the component pin surfaceswith IPA. After cleaning the chips were mounted on a custom madestainless steel jig using Crystalbond 509 (Aremco Products Inc, US). Thesamples were first ground down starting from 240 grit paper to 4000 gritSiC papers. Then polished with 1 micrometer and 0.5 micrometer diamondpapers, respectively. All the samples were investigated using a scanningelectron microscope (Quanta 600, FEI Company, US) and elemental mapswere obtained using EDS up to 40 keV range.

Results and Discussion

Electrical Contact Between Liquid Metal and the Component Pins

The electrical connection between liquid metal interconnects and thecomponent pins with and without HCl vapor soldering was investigatedusing EGaIn. A test circuit design on a conventional PCB board,including two Cu interconnects that is connected by a zero-ohmsurface-mount resistor was prepared. Circuit resistance was measuredusing a microohmmeter with 4-point contact probes to isolate theproperties of liquid metal-component interface from mechanical andelectrical effects of the LM leads (interconnects). LM was depositedonly on the portion of the Cu pads where the component was connected. Intotal, three sets of 10 test samples were fabricated. In one set,conventional solder paste was used to connect the component with theinterconnect pads using reflow soldering (the conventional solder paste(CSP) set). This set was considered as the reference, since it wasproduced with conventional PCB fabrication methods. In the other twosets, EGaIn was used as the solder material. One of the EGaIn solderedsets was treated with HCl (the HCl set) while the other was not treated(the non-HCl set). Another set of samples with the same trace dimensions(FIG. 30B) but without any microelectronic component (the no-component(NC) set) was also prepared.

For the cases with EGaIn, the conductivity was measured immediatelyafter placing the microelectronic component onto the applied drops(before the HCl treatment for the HCl set). 9 out of 20 samples had noimmediate electrical conductivity. The HCl treatment was then applied toa subset of 10 samples, and the conductivities of all samples (includingthe soldered samples) were subsequently tested. The resistances of theconductive samples are shown in FIG. 5 .

At hour zero, 4 out of 10 of the non-HCl samples had no conductivity: 2of those gained conductivity after 15 min, one gained conductivity after2 days, and one failed to gain conductivity within the 12 day testperiod. Furthermore, the 6 samples that were conductive exhibited verylarge variations in conductivity values. The resistance from thefunctional non-HCl samples reduced steadily after day one. On day 12,the resistance was stable at 60.6±4.9 mΩ Immediately after theapplication of HCl vapor, all samples from the HCl-treated set showed ahigh level of conductivity, similar to those from the CSP set. Theresistance remained about constant in time, with a very small amount ofvariability. On average, the resistances of the HCl-set and the CSP setwere 48.2±2.0 mΩ and 47.2±0.4 mΩ, respectively. The resistance measuredfrom the NC set was 40.9±0.3 mΩ The resistance measured from the NC setshowed that about 40.9 mΩ of the resistance measured corresponds to thecopper interconnects while the remaining value corresponds to thesolder-component interface and the component itself. HCl treatmentresulted in more than 2.5 times less resistance at the interface andmore than 50% reduction in variability at the interfacial resistance.

FIG. 10B shows the shape of the liquid metal at the component-liquidmetal interface before and after HCl vapor application. FIG. 10A showsthe side views of a surface-mount resistor in contact with LM-coated Cucontact pads with and without HCl treatment. As a reference, a side viewof a surface mount device-copper connection was obtained usingconventional solder paste. Before the HCl treatment, the componentrested on the LM-coated Cu pads and had a limited contact area. When HClvapor was applied, liquid metal surrounded the component pins (composedof Sn-plated Cu). This not only increased the interfacial contact area,potentially reducing the contact resistance, but also produced a bettermechanical connection between the LM and microelectronic component. Asshown in FIGS. 10A and 10B, the HCl treated LM-component interfaceresembles the conventional solder-component interface.

FIG. 5 shows certain benefits to using HCl vapor to solder the packagedcomponents to the terminals of the LM circuit to make immediate andreliable electrical connectivity. When HCl vapor is not applied, theelectrical contact may take hours or days to form. Without wishing to bebound to any particular theory, considering that the component pins aretin coated, the time-dependent connectivity in the absence of HCl vapormay be related to the reactive wetting observed between EGaIn and Sn.

Without wishing to be bound to any particular theory, it is believedthat the present invention provides one or more of the followingadvantages relative to existing fabrication methods: (i) the HCltreatment provides more reliable fabrication of robust LM-componentinterfaces, i.e., higher yield (20/20 work, versus only 11/20 withoutHCl treatment), more reliable conductivity in time, and less variationsin conductivity; (ii) when treated with HCl, LM-component interfacesbecome conductive immediately and maintain a stable contact resistance,with very low variability over time; and (iii) with HCl treatment, theinterface conductance is similar to or better than that of aconventional solder joint. Referring to FIGS. 10A and 10B, theinterfacial contact area is larger in the treated versus nontreatedcase, and this may relate to a lower contact resistance between thecomponent pins and the LM leads.

Self-Alignment of Components Through HCl Treatment

FIG. 10B shows the top and side views of the EGaIn drops applied on theCu pads, initial placement of a component on the pads, and the componentafter the HCl treatment. Although the component was placed in amisaligned manner with respect to the layout of contact pads, withoutwishing to be bound by any particular theory, it is believed that theHCl vapor exposure caused the component to self-align itself withrespect to the contact pads dur to the high surface tension of theliquid metal. FIG. 10B shows self-alignment for theEGaIn-microelectronic interfacing.

The self-alignment was evaluated by the placement of nine components.For this purpose, the misalignment of the components both before andafter the application of the HCl vapor was measured. The test designincluded two LM-contact pads patterned on a Si-wafer backed PDMSsubstrate. The component (zero-ohm resistor) was placed on these padsmanually.

FIG. 11 shows a schematic description of the angular and translationalmisalignment of a component with respect to the contact pads. Theangular misalignments are represented by three Euler angles (roll,pitch, and yaw), and the in-plane translational misalignments aredescribed by the eccentricity (Ecc X and Ecc Y) of the componentgeometric center with respect to the geometric center of the connectionpads on circuit. The average values of these quantities are presented inthe table in FIG. 11 . As shown in FIG. 11 , the HCl treatment reducedthe misalignment and associated standard deviation in each Euler angle.Although to a lesser extent, the eccentricity along the in-planetranslational axes was also reduced by the HCl treatment. As also shownin FIG. 10B, the vertical distance between the substrate surface and thecomponent surface decreased by the HCl treatment from 568±28 micrometersto 455±7 micrometers, which is approximately equal to the componentthickness (450 micrometers according to the manufacturer's datasheet).This means that the gap between the substrate and the component wasalmost completely closed after the treatment. By reducing themisalignment, such behavior may allow for the fabrication of highdensity circuits without violating minimum clearances between componentpins and between components dictated by printed circuit boardmanufacturing standards. For prototyping purposes, self-alignment mayreduce or eliminate the use for expensive, high-accuracy tools forprecision component placement.

Strain Limit and Electromechanical Response

To obtain a quantitative assessment of the electromechanical behavior ofthe LM-based circuits and component-LM interfaces, quasistatic tensiletests were conducted on specimens containing a zero-ohm surface-mountresistor and LM interconnects. Referring to FIG. 12A, two sets of sixtest samples were fabricated, with one of the sets treated with HClvapor. Referring to FIG. 12A, measurements were also performed on anadditional pair of two test samples that only had an LM trace with nosurface-mount resistor. Similarly, one of the sets in the LM-onlysamples was treated with HCl vapor.

FIG. 12B shows the relative change in electrical resistance (ΔR/R₀) withthe applied strain (E) and the associated theoretical predictions. Thetheory is derived from Ohm's Law and assumes that the change inelectrical resistance is governed by the change in conductivity of theLM leads. Referring to FIG. 12B, the highest strain values atfailure—84.5±9.4% with HCl treatment and 86.3±12.6% with notreatment—were observed for the LM-only circuits, i.e., when there is nomicro-electronic component integrated in the circuit. For the circuitswith a microelectronic component, the maximum strain values of82.6±13.3% and 57.7±7.9% were observed with and without HCl treatment,respectively. These results may indicate that the HCl treatment mayenable LM-microelectronic interfaces with similar stretchability as thatof the LM-only circuits. Further, HCl treatment increased the meanstrain at failure by about 25% for circuits with microelectronicscomponents.

As shown in FIG. 12B, the strain-resistance behavior agrees with thetheoretical estimation in HCl-treated case for up to about 60% strainand in nontreated case for up to about 40% strain. Beyond these strains,the strain-resistance behavior deviated significantly from theory.Without wishing to be bound to any particular theory, the LM,lead-component interface showed the rupturing of the elastomer at theinterface and the formation of the voids in which the liquid metalinfiltrates (see FIG. 34 ). As the sample is stretched, the voids grewlarger and more LM leaks into the voids until the sample completelyfailed. Comparing the geometry of LM on the leads (length, width, heightwere 45 mm, 0.6 mm, 30 micrometers, respectively) with the LM on thecontact pads at the component pin interface (length, width, height were0.8 mm, 0.8 mm, 500 micrometers, respectively), the volumes of the LM onthese two regions were comparable. However, assuming LM-pin interfacewas formed properly, the resistance of the LM at the leads was twoorders of magnitude higher than the resistance of the LM at thecomponent pads, and thus, dominated the measured resistance. Therefore,the flow of LM from the leads and pin interface and into the voids mayhave an effect on the measured resistance. The difference between thetheoretical approximation and the experimental results may be likelyrelated to the theoretical approximation that ignores this flow ofliquid metal at the onset of the mechanical failure and only considersthe strain-controlled electromechanical response of the LM leads.

Finally, without wishing to be bound to any particular theory, the lossof conductivity may be related to the mechanical rupture of theelastomer rather than electrical failure of the LM leads or LM-pinconnections. Referring to FIG. 35 , the samples having embeddedcomponents may show failure at the LM-component interface. When loadedto beyond 80% strain, test circuits having embedded rigid componentsfailed due to tearing at the interface between the LM lead and componentpin. This location of failure may be expected since the mechanicalmismatch may lead to stress concentrations. FIG. 10B shows the geometryof the LM connection with and without HCl treatment. With HCl treatment,the interface has a smooth transition that fully encapsulates the endsof the component. By contrast, the nontreated samples exhibit an abrupttransition that connects mainly at the bottom edges of the components.Referring to FIG. 10B, the top views of the HCl treated and nontreatedsamples showed characteristics similar to the side views. Furthermore,in nontreated circuits, the component had an arbitrary orientation whilein HCl treated circuits, the component was aligned along the axis ofinterconnects. Such a misalignment that exposes the corners of thecomponents and the cusp-like LM-component interface may result instress-concentrations and points of premature delamination that drivethe system into mechanical failure. Factoring this additionalcontribution to electromechanical coupling may benefit from 3Dcomputation modeling of the “three-body” liquid-component-elastomerinterface using finite element analysis (FEA).

Electromechanical Response During Cyclic Loading

The fabricated circuits were functional under various loading conditionsand associated strains. The electromechanical behavior was examined forspecimens by loading 2000 cycles between 5% and 40% strain. As withstrain limit testing, measurements were performed on four types ofspecimens: (i) zero-ohm chip with LM leads and HCl treatment, (ii)zero-Ohm chip with LM leads and no HCl treatment, (iii) LM trace withHCl treatment and no chip, and (iv) LM trace with no HCl treatment orchip.

FIG. 12C shows the change of normalized resistance at maximum (upperline) and minimum (lower line) strains with increasing number of cycles.None of the three HCl-treated samples failed during the 2000-cycle test.The initial three nontreated samples, on the other hand, failed withinthe first 20 cycles (not shown in FIG. 12C). Out of another four newsamples, only one survived the 2000-cycle test, and the other threefailed before the completion of the test. The six nontreated samplesfailed prematurely and ruptured in the vicinity of LM-componentinterface. The crack at the interface grew with each cycle and resultedin failure.

The higher strain limit and endurance properties of HCl treated rigidcomponent embedded samples to the reduced stress concentration may beachieved by one or more of the following: (i) at the component pin-LMlead interface, LM is fully encompassing the edge of the component pinssuch that there are no sharp corners; and (ii) the embedded component isaligned along the axis of interconnects. The results indicated that theelectromechanical response is relatively repeatable and that there is nosignificant electrical hysteresis. All samples that survived 2000 cyclesshowed a slightly decreasing trend in electrical resistance with eachcycle reaching a stable value after several hundred loading cycles. Insamples with a microelectronic component, the amount of decrease witheach cycle was more pronounced compared to the samples without acomponent. The observed decrease in resistance may be related to thecomponent pin-LM lead interface. Although the normalized resistancevalues were very close at the initial cycles of the test, a smalloverall variation in the cyclic electromechanical behavior of the HCltreated samples having embedded component was observed. This variationmay relate to the sample-to-sample variation in the deposited amount ofLM to the LM-component interface.

Fabrication Method

The method of circuit fabrication may generally comprise: (i) design ofthe circuit, (ii) fabrication of elastomeric circuit, (iii) electronicsinterfacing, and (iv) elastomer sealing. Certain steps of thefabrication method are shown in FIG. 8A. Analogous to PCB manufacturingand assembly, the first step may be to design the electronic circuitusing a circuit design software (e.g., Autodesk EAGLE). The next stepmay be the fabrication of the circuit having liquid metal interconnects.Referring to FIG. 8A, the elastomeric substrate material (PDMS) may beobtained by molding and a Cu wetting layer may be sputter depositeddirectly on elastomeric substrate with a Cr adhesion layer between Cuand elastomer. Copper may be used as the wetting layer instead of Ausince Cu is ubiquitous for electronics manufacturing, low-cost, alloyswith EGaIn, and has better adhesion properties to the Cr adhesion layerthan Au. Referring to FIG. 13A(i), the metal wetting layer may bepatterned using a ultra-violet-laser micromachining (UVLM) system. As analternative to direct patterning, the Cr/Cu layer may be patterned byusing a stencil as a shadow mask during sputter deposition. The stencilmay be produced by various methods, including, but not limited to,precision etching, DRIE, UV laser machining, precision micromachining,and carbon dioxide laser machining. As shown in FIG. 13A(ii), NaOHtreated LM may be deposited on Cu wetting layer. NaOH treatment mayreduce oxide that form on top of the Cu wetting layer and remove theoxide skin on the liquid metal surface, thus exposing the bulk EGaIn toCu. As EGaIn readily wets the Cu wetting layer and does not adhere tothe exposed PDMS surfaces, EGaIn may be selectively deposited onto theCu traces. The liquid metal interconnects may have a linewidth as smallas 10 micrometers, 20 micrometers, 30 micrometers, and 40 micrometers,for example. In regions where the gap between the traces are small,bridging between consecutive lines may occur due to excess liquid metalapplied to the surface. To remove the excess liquid metal, the samplemay be dipped into 3% w/w NaOH treated liquid metal bath vertically.Referring to FIG. 13A(iii)-(iv), the microelectronic components may beplaced on their designated positions and may be exposed to HCl vapor tothe locations where liquid metal contacts the electronic terminals.Gently blowing HCl vapor may remove the oxide layer on LM and oncomponent pins, and bring materials in contact to initiate solderingbetween LM leads and component pins. The vapor-controlled removal of thegallium oxide may expose the bulk EGaIn alloy. Having a copper wettinglayer on the substrate may provide alloying between the liquid metal andcopper to prevent/reduce dewetting and removal of LM when exposed to HClvapor. Without this wetting layer, applying the vapor may result indistortion of the circuit and degradation of the LM-substrate interface.Referring to FIG. 13A(v), the circuit may be sealed by pouring andcuring the top elastomer layer, thereby entirely encapsulating theLM-based circuit.

Circuit Implementations

Functional circuits comprising the LM interconnects and microelectronicscomponents were made and tested. The hybrid circuits included analog anddigital sensors having surface-mount integrated circuit packages,including land grid array (LGA), quad flat no-leads (QFN), andsmall-outline transistor (SOT) architectures. The pin architecture ofeach package is shown in FIG. 14A. As shown in FIG. 14B, each circuitalso included other surface-mount components such as an flexible flatcable (FFC) connector, a light-emitting diode (LED), and various passivecomponents (capacitors and resistors).

Referring to FIG. 8B, the first circuit comprises a digital IMU(surface-mount with QFN packaging) and a digital temperature sensor(surface mount with SOT packaging) that are connected with LMinterconnects. Referring to FIG. 8C, the second circuit comprises ananalog 3-axis accelerometer (surface-mount with LGA packaging),surface-mount capacitors, and an FFC connector connected by LMinterconnects. The IMU having QFN packaging has surface mount contactshaving a 200 micrometer width and a 400 micrometer pitch, while theaccelerometer with LGA packaging has a 350 micrometer width and a 650micrometer pitch. The representative images of the functioningstretchable circuits are shown in FIGS. 13B-D.

To verify the electrical circuit performance quantitatively, the circuitmeasurements were compared to the motions of a precision two-axisgoniometer. For this purpose, both circuits were loaded on a motorizedgoniometer and smoothly rotated in pitch and roll angles by ±5°. Therotation angles from the IMU followed those from the goniometers withless than 1% deviation. For the analog accelerometer, the difference waswithin 8%.

A set of quasistatic tensile tests was conducted to quantify the strainlimit of these hybrid circuits. The electrical resistance and strain ofthe sensors were simultaneously recorded during tensile loading. Twosamples for each circuit were made and tested up to failure. Thecircuits with IMU and temperature sensors mechanically failed at strainsof 39% and 42%, and the circuits with the analog accelerometer failed atthe strains of 55% and 60%. FIG. 14E shows representative images thatshow the circuits tested until failure at different applied strains. Noelectrical failure was observed in any test prior to mechanical failure,and the samples failed mechanically at the LM-pin interface of thelargest circuit component. Without wishing to be bound to any particulartheory, this failure mode may be related to the strain concentration atthe circuit component/elastomer interfaces. The differences in thestrain limits may arise from the circuit designs and componentgeometries. In the tested strain range, the standard deviations of themeasured accelerations for the analog accelerometer circuit in the X, Y,Z directions were 0.011 g, 0.004 g, 0.007 g, respectively. For thedigital IMU and temperature sensor circuit, the standard deviations ofthe measured accelerations in X, Y, Z directions were 0.005 g, 0.001 g,0.008 g, respectively. The standard deviations of the measuredrotational rates in X, Y, Z directions were 0.139 deg/s, 0.151 deg/s,and 0.071 deg/s, respectively, while the standard deviations of themeasured magnetic field strengths in X, Y, Z directions were 0.01, 0.01,0.016 Gauss, respectively. Finally, the standard deviation of thedigital temperature sensor was 0.032° C. In general, the variation inthe acceleration data from the analog accelerometer was higher than thatfrom the digital IMU sensor. Since the applied strain changes theresistance of the LM interconnects, the data transmitted from the analogsensor may vary more than that transmitted from the digital sensors.

Example 2

Reproducible, controllable, and scalable manufacturing of LM-based SSEsmay be useful for commercial adoption. The ability to control thedeposited amount of LM, and to create precise and reproducible LMpatterns may be used to obtain desired and consistent electricalcharacteristics that are useful for the commercialization of LM-basedsoft electronic circuits. A scalable manufacturing process for LM-basedSSEs may comprise photolithographic patterning of copper wetting layerwith a LM deposition process. This may be referred to as LM dip-coating.The manufacturing process for LM-based SSEs may comprise a LMdip-coating process wherein EGaIn may be selectively loaded withoutmanual execution on the designed wetting layer patterns made of a thinmetal layer.

A method of LM dip-coating may comprise exposing/immersing a substrateinside of a LM bath with little or no motion for a designated “dwelltime” sufficient for to provide the LM enough time to wet the substratesurface. The substrate may be withdrawn from the LM bath at a constantspeed. Without wishing to be bound to any particular theory, one or moreof the following parameters of the LM deposition with dip-coating may beselected to achieve consistent LM pattern geometries: dwell time, linewidth, withdrawal speed (U), wetting layer geometry (width, Wandorientation, Θ). The statistical significance of each parameter may bedescribed using an analysis of variance (ANOVA) technique.

Introduction

A schematic representation of dip-coating process is shown in FIG. 15A.A method of LM dip-coating may comprise vertical dip-coating of awetting layer having width W and orientation Θ on a non-wetting platethat may be withdrawn from a bath (i.e., a reservoir) filled with the LMto be coated. The orientation Θ may be defined as the angle between thelongitudinal axis of the wetting layer and the dipping axis (i.e., thedirection of dipping). The plate may be withdrawn from the bath at asubstantially constant velocity U. The capillary length (l_(c)) may bedefined as the characteristic length scale of the liquid and it mayscale the radius of curvature of the static capillary meniscus (meniscusshown in FIG. 15A) on a completely wetting surface and may be describedas follows:

$\begin{matrix}{l_{c} = \sqrt{\frac{\gamma}{\rho g}}} & (4.1)\end{matrix}$where γ and ρ are the interfacial tension and density of the liquid,respectively, and g is the gravitational acceleration.For an infinite, homogeneous and flat plate (W>>l_(c) and Θ=0) that iswithdrawn at a constant speed U, the relationship for peak height orcenterline thickness of the deposited liquid (h_(p)) may be described asfollows:h _(p)=0.946l _(c) Ca ^(2/3)  (4.2)where Ca is the capillary numbers and may be described as follows:

$\begin{matrix}{{Ca} = \frac{\mu U}{\gamma}} & (4.3)\end{matrix}$where μ is the viscosity of the liquid. When W<<l_(c), there may be asecond curvature in the direction transverse to the liquid adhering tothe wetting layer. This transverse curvature may become the dominatinglength scale for the deposited film thickness and may result in muchthinner liquid films. Far above from the bath surface, the peak heightor centered thickness of the deposited liquid (h_(p)) may be constantalong the vertical direction. The liquid may be only entrained on thewetting region. When it is deposited on the plate and removed from thebath, it may assume a cylindrical cap shape dictated by the liquid'sinterfacial tension and the substrate width. Assuming perfect wetting,viscous forces and gravity may affect the liquid motion in this region.At the bath surface, the shape of the meniscus may be governed by thebalance between hydrostatic pressures and capillary forces. The overlapbetween those two regions may be referred to as the “dynamic meniscus”region and may be governed by the balance between viscous, capillary andinertial forces (if any). The flow in the dynamic meniscus may controlthe dynamics of the liquid film and its thickness.

Using this representation, the seeding relationship (for Θ=0) and showedthat the deposited liquid thickness not only depends on Ca but also W:h _(p)=KWCa^(1/3)  (4.4)where the constant K is as 0.356. Both Equations 4.2 and 4.4 werederived for completely wetting Newtonian liquids using lubricationapproximations. The assumptions of lubrication approximations may besummarized as: (i) negligible gravitational and inertial effects, (ii)non-evaporating liquid, and (iii) liquid height is smaller thansubstrate length (h_(p)<<L). The assumption may be valid when Ca<about10⁻², above which gravitational effects start to show up and contributesto less liquid entrainment on the substrate.

For EGaIn dip-coating on a copper wetting layer, EGaIn may be assumed toperfectly wet to the metallic surface (due to the alloying between EGaInand Cu) and EGaIn may be assumed to not wet the PDMS surface.Furthermore, EGaIn has been shown to exhibit a Newtonian liquid behaviorwhen the oxide skin was dissolved. Assuming NaOH treated EGaIn as aNewtonian liquid with a viscosity (μ) about 1.99 mPa·s, interfacialtension (γ) of about 500 mN/m, and a density (ρ) of about 6250 kg/m³,the capillary length may be about 2.8 mm. Furthermore, using the samevalues for liquid properties, the withdrawal speed at which thegravitational effects starts to show up may be about 2.5 m/s. Hence, forthe withdrawal speed range less than 300 mm/s, no gravitational effectmay be expected.

Materials

The substrate material used in test samples was polydimethylsiloxane(PDMS). It was prepared with Sylgard 184 (Dow Corning, USA) using a 10:1oligomer to curing agent ratio. A 3% w/v NaOH solution was prepared bydiluting 30% w/v NaOH solution (BDH Chemicals) with deionized water(100%, McMaster-Carr, USA). Deionized water (DI water) and isopropylalcohol (IPA) (2-Propanol ACS 99.5% min, Alfa Aesar, USA) were used toclean the surface of samples after liquid metal deposition. Eutecticgallium-indium alloy was prepared by mixing Ga (Gallium Source, USA) andIn (Gallium Source, USA) at a 75.5:24.5 ratio by mass, and heating andhomogenizing at 190° C. on a hot plate for 12 hours.

Dipping Setup

A setup used in the dipping experiments is shown in FIG. 15B. The setupincluded a motorized stage that moves the EGaIn bath for dip-coating anda fixed sample holder. The bath containing 3% w/v NaOH treated EGaIn wasattached to a 5-axis stage (AI-TRI-HR4, ALIO Industries, USA). The stageincluded rotational axes which may be employed. The vertical axis of thestage was used in the dipping while the horizontal axes of 5-axis stagewere used for centering the sample with respect to the bath. The sampleholder and the bath holder were 3D-printed (Objet30, Stratasys, USA).The experimental setup may accommodate constant withdrawal speeds up to300 mm/s along about a 27 mm vertical dipping range while carrying theEGaIn bath.

Fabrication of Samples

A 4-inch single-crystal silicon wafer was cleaned by rinsing withacetone and IPA and blow dried with nitrogen. Then the silicon wafer wassurface treated with four drops of trichloro(1H,1H,2H,2H-perfluorooctyl)silane (TFOCS, purchased from Sigma Aldrich, USA) under vacuum for 45minutes to remove the PDMS. TFOCS vaporizes and deposits as a monolayerthrough siloxane bonding. Next, the silicon wafer was spin coated withPDMS (base and curing agent 10:1 weight ratio, Sylgard 184, Dow Corning,USA) at 800 rpm for 30 seconds and cured on a hotplate at 60° C. for 8hours. Next, a 20 nanometer chromium (Cr) adhesion layer (30 W power, 20mTorr pressure) was sputter deposited on the PDMS substrate. Then a 150nanometer copper (Cu) alloying layer was sputter deposited (30 W power,5 mTorr pressure; Perkin-Elmer 8L, USA) on the chromium (Cr) adhesionlayer. The thickness of copper was selected as the minimum thicknessthat may be deposited without any cracks. Thinner copper layers mayresult in a cracked wetting layer. Moreover, as the copper thicknessincreased, the spatial frequency of the cracks decreased and diminishedat about 150 nanometer thickness. Positive photoresist was spin coatedon Cu surface at 4000 rpm for 30 seconds with a spreading run at 600 rpmfor 6 seconds (AZ 4210, Microchemicals, Germany) resulting in athickness of about 2.1 micrometers. Next, the photoresist was left todry for 24 hours at room temperature since baking cracks metal andphotoresist layers due to the thermal expansion coefficient mismatchbetween layers. The substrate was exposed to UV light using a contactmask aligner (MA6, Suss Microtec, Germany) for 170 seconds (UV300filter, 320 nanometers at 5 mW/cm²) through a transparency maskcontaining the desired sample design (purchased from CAD/Art ServicesInc, USA). The photolithography masks were designed in Circuit-Maker(Altium Limited, Australia). Following the exposure the photoresist wasdeveloped for 1.5 minutes (AZ Developer 1:1 ratio, AZ ElectronicMaterials, Luxembourg). The substrate was exposed to UV light using acontact mask aligner for 400 seconds without a mask (i.e. floodexposure) (UV300 filter, 320 nanometers at 5 mW/cm²). Next, Cu and Crlayers were wet etched. The Cu layer was wet etched for 120 secondsusing a 1:15 volume ratio of Cu etchant (APS-100 Copper Etchant,Transene Company Inc, USA) to DI water solution. Likewise, the Cr layerwas wet etched for 90 seconds using a 1:10 volume ratio of Cr etchant(Chromium Cermet Etchant TFE, Transene Company Inc, USA) to DI watersolution. The photoresist mask was then stripped off by immersing thesubstrate into photoresist developer for 1.5 minutes (AZ Developer 1:1ratio). The stripping was done using the photoresist developer sinceacetone may swell PDMS and result in cracks in the metal features.Before dicing, the substrate was spin coated again at 4000 rpm for 30seconds with a spreading run at 600 rpm for 6 seconds and left to dryfor 24 hours at room temperature. The substrate was exposed to UV lightusing a contact mask aligner for 400 seconds without a mask (i.e. floodexposure). After that the wafer was diced into final sample shape with adicing saw (782-6 Dicing Saw, Kulicke and Soffa Industries Inc, US).Photoresist coating protects the Cu patterns from cracking and waferdust during dicing. After dicing individual samples were attached toglass slides using a cyanoacrylate-based glue (Krazy Glue Home AndOffice Brush-On, Elmer's Products, USA). After that, the photoresistlayer was stripped off by immersing the substrate into photoresistdeveloper for 1.5 minutes (AZ Developer 1:1 ratio). Finally, thesubstrate was attached to the dip-coating experimental setup andimmersed into 3% w/v NaOH treated EGaIn bath with the specified speed.The volume of aqueous NaOH solution on LM is 3.5 mL, which created anaqueous NaOH film about 8 mm thick. It was then kept in the bath for adesired dwell time to allow the LM wet to the copper surface and thenwithdrawn from the bath with a specified constant speed. Following thedip-coating the EGaIn coated substrate was immersed horizontally into DIwater and IPA to clean residual NaOH and then dried on a hotplate with60° C. for 10 minutes.

Characterization of Liquid Metal Patterns

The printed EGaIn geometries were measured with a white lightinterferometer (using NewView, Zygo, USA). The microscopy images weretaken by using either a stereo microscope (purchased from McMaster CarrInc, USA) or using the microscope of a 3D surface measurement system(Infinitefocus, Alicona, Austria). The obtained geometrical data wereprocessed in MATLAB (MATLAB 2016, MathWorks, US) along with statisticalanalysis and modeling.

Results and Discussion

Dwell Time for Liquid Metal Dip-Coating

The time the substrate is kept inside the LM bath may be sufficient toachieve a consistent and successful LM deposition in dip-coating. In thesolder dip-coating, for example, it was shown that when the dwell timewas too short, incomplete or inconsistent wetting may occur. In order todetermine the dwell time sufficient for successful liquid metaldip-coating, a randomized parametric study was conducted using twodifferent experimental designs. The first set of samples were PDMScoated one inch silicon wafers that were completely coated with a thinfilm of copper, which may be referred to as the “blanket samples”. Thesecond set of samples had a wetting layer design shown in FIG. 16A,which may be referred to as the “line samples”. Both set of samples hadthe same thickness of copper alloying/wetting layer (about 150nanometers) sputter coated on PDMS using the same settings and samethickness of chromium adhesion layer (about 20 nanometers) between thePDMS and copper layers. The line samples were patterned usingphotolithography and wet etching on a PDMS coated Si wafer as describedabove and diced into specimen as shown in FIG. 15B and FIG. 16A. Eachspecimen included wetting layer strips of copper having widths of 10micrometers, 30 micrometers, 50 micrometers, 100 micrometers, 200micrometers and 500 micrometers, respectively, and a length of 5 mm. Intotal there were 6 strips (one per each line width). The gap between twoadjacent lines along their width axis was about 3 mm (>l_(c) of NaOHtreated EGaIn) to minimize any potential areal effects betweenindividual lines. The immersion and withdrawal speeds were kept constantat 1 mm/s and 75 mm/s, respectively.

The experiments were conducted as follows:

TABLE 1 The results for minimum dwell time for consistent dip-coatingexperiment. Line Minimum Dwell Width (μm) Time (min) 10 N/A 30 N/A 50 11100 9 200 7 500 7 Blanket samples 1

The samples were first immersed in the bath with a constant immersionspeed of 1 mm/s. Then, the samples were kept there for the desired dwelltime. Lastly, the samples were withdrawn with a constant speed of 75mm/s. The dwell times investigated were 1 minute and 3 minutes for theblanket sample set and 1 minute, 3 minutes, 5 minutes, 7 minutes, 9minutes, 11 minutes, 13 minutes and 15 minutes, respectively, for theline sample set. To determine a dwell time that achieves successful andconsistent coating between different samples, 3 different samples wereused for each dwell time (24 specimens and 144 lines for line samplesand 6 wafers for blanket samples in total). After the dipping wasconducted, each sample was investigated visually under microscope todetermine the percent of wetting layer area that was covered with LM.

FIGS. 16A and 16B show the wetting layer geometries before and after LMdip-coating. The wetting behavior of LM in dip-coating was binary withinthe dwell times for line samples. No partial wetting behavior in any ofthe lines was observed; for a given dwell time each individual line waseither completely coated with LM or not coated at all. Furthermore, allthe blanket samples were completely coated with LM within the dwelltimes.

Table 1 shows the results for minimum dwell time for consistent LMdip-coating. The minimum dwell times reported in the table were theminimum times that resulted in complete wetting for all three samplesconsistently. The blanket samples were completely loaded with EGaInafter 1 minute dwell time. In the second set, LM lines down to 50micrometers width consistently. The results show that the dwell timesufficient for LM to wet the copper layer decreased with the increasingwetting layer line width or area.

Referring to Table 1, at 30 micrometer width, only one out of threesamples successfully deposited LM having 11 minutes and 13 minutes ofdwell times, respectively. In the remaining two samples, however, thewetting layers were peeled up from the PDMS surface either partially orcompletely. FIG. 16B shows at 10 micrometers width, either no wetting(in short dwell times), or complete or partial peeling of wetting layerfrom PDMS within the range of dwell times studied. Without wishing to bebound to any particular theory, it is believed that when the substrateis inside the LM bath and the LM is wetting to the Cu layer, a peelingforce is applied on the wetting layer by the surface tension of LM. Whenthe wetting layer area is small (e.g. for a line width of 10micrometers), the adhesion between PDMS and the wetting layer may not besufficient to prevent peeling against surface tension forces and maycause partial or complete peeling from PDMS. Alternatively, the inertialand viscous forces applied on the wetting layer during withdrawal fromthe bath combined with the surface tension may cause mechanical failureof the adhesion layer. As discussed in more detail below, however, whenthe immersion speed and dwell time is constant at 1 mm/s and 11 min,respectively, at a withdrawal speed less than 0.1 mm/s (such as 0.08mm/s, for example), partial peeling of wetting layer geometries evenwith relatively large line widths of 50 micrometers, 100 micrometers and200 micrometers may be achieved. Withdrawal speeds less than 0.1 mm/scaused the sample to stay in the bath for an additional time greaterthan 9 minutes, increasing the total immersion time to more than 20minutes. Without wishing to be bound to any particular theory, it isbelieved that long immersion times may affect the adhesion of wettinglayer to PDMS substrate (possibly due to the alloying between EGaIn andCu), and cause peeling due to surface tension force since the inertialand viscous forces were negligible in such small withdrawal speeds.

TABLE 2 Experimental parameters investigated for LM dip-coating.Parameter Levels Orientation (deg) 0, 45, 90 Line Width (m) 50, 100, 200Withdrawal Speed (mm/s) 0.1, 1, 10, 25, 75, 3004.4.2 Characterization of Liquid Metal Dip-Coating

The effects of the process parameter (withdrawal speed, U) and wettinglayer geometry (width, W, and orientation, Θ) on the resulting LMgeometries were studied via a full-factorial design of experiments. Theexperimental parameters are shown in Table 2. Six different levels ofwithdrawal speed (U), and three different levels of wetting layer width(W) and wetting layer orientation (Θ) with respect to withdrawaldirection were mixed in a full factorial experimental design. Hence, theexperiment included 54 sets of parameters.

The sample designs used for the dip-coating process characterization areshown in FIG. 16C. The samples were fabricated using photolithography ona PDMS coated Si wafer as explained above and diced into specimens (asshown in FIG. 15C). Each specimen included wetting layer strips of Cuwith a combination of widths of 50 micrometers, 100 micrometers, and 200micrometers, and orientations of 0 degrees, 45 degrees and 90 degrees.The location of each strip was assigned randomly within eachorientation. In total there were 18 strips (2 per each linewidth—orientation combination). The gap between two adjacent lines alongtheir width axis was about 3 mm and 5 mm (>l_(c)) along their lengthaxis to minimize any potential areal effects. Three different sampleswere made for each withdrawal speed level (18 specimens and 216 lines intotal). The lower limit of withdrawal speed was selected as 0.1 mm/s.The upper limit of withdrawal speed was selected as the maximum speed ofthe stage while carrying the LM bath. The withdrawal speed applied oneach specimen was selected in random order.

The effects of aforementioned parameters on two process outputs wereinvestigated: (1) average peak height along a line and (2) heightvariation along a line (one standard deviation of peak heights). Thepeak height (h_(p)) is defined as the height of the peak point for across-section along the width of the LM line and shown in the inset ofFIG. 15A. Using this definition the two process outputs were calculatedas follows: the surface profile of each LM line on a sample was measuredalong the longitudinal axis of the line (see FIG. 16D) leaving about 500micrometers from both ends. Then the average and standard deviation ofthe peak points along line length were computed for each line. As aresult, each line measurement was represented with average peak heightand peak height variation.

ANOVA Results

To quantitatively analyze the importance of the factors on LM geometry,an ANOVA study was performed on the experimental data collected. To helpin interpreting the ANOVA results beyond the statistical significance,relative contributions of experimental parameters and their interactionswere also computed. The full ANOVA tables for average peak height andheight variation are shown in Tables A.1 and A.2, respectively. Thetables show the ANOVA results of individual effects as well as thetwo-way and three-way interactions between experimental factors.

TABLE 3 Summary of ANOVA results for process outputs. Statisticallysignificant results (p < 0.05) are designated with bold font. PeakHeight Height Variation % Contribution Contribution Parameter p-value(100 × 9²) p-value (100 × 9²) Orientation 0 14.2 0.557 0.2 Width 0 39.90 22.1 Speed 0 22.4 0.0138 3.6 Orientation × Width 0 9.1 0.948 0.19Orientation × Speed 0 1.36 0.1239 3.78 Width × Speed 0 10.0 0.9685 1.15Orientation × 0 1.1 0.9345 2.76 Width × Speed

Besides the ANOVA results, the tables also report the effect sizemeasures η² and ω² computed from ANOVA results, η² is the most commonlyused measure and estimates the proportion of the variation in the outputthat is explained by different effects based on the sample. ω² is anunbiased estimate of the effect size and estimates the proportion of thevariation in the output that is explained by different effects based onthe entire population instead of the sample. As shown in the table, thesample size increases, the bias in η² decreases and the differencebetween these two measures becomes very small. The difference between η²and ω² is negligible and the p-value and contribution percent (100×η²)as a summary of ANOVA results for process outputs in Table 3.

The p-values given in Table 3 show that within the range of experimentalconditions all parameters and their interactions affected the height ofthe LM patterns. The fact that line width, withdrawal speed and theirinteractions affected the peak height of the LM patterns was inagreement with the Equation 4.4. Without wishing to be bound to anyparticular theory, considering the percent contribution shown in thetable, line width had the largest effect on the deposited LM height,followed by withdrawal speed and orientation. The combination of linewidth and withdrawal speed had a slightly larger effect than thecombination of orientation and line width. The interaction effect oforientation and speed was statistically significant but its contributionwas only 1.36%. Lastly, the three-way interaction of all investigatedparameters had a statistically significant effect on the average peakheight, but their contribution was only 1.1%.

Referring again to ANOVA results reported in Table 3, the heightvariation along a line was affected by line width and withdrawal speedonly. Even though withdrawal speed had a statistically significanteffect on height variation, its contribution percent was only 3.6 and anorder of magnitude lower than the effect of line width (22.1%).Orientation did not show any statistically significant effect on theheight variation. The interaction of the studied parameters in differentlevels also did not show any statistically significant effect on theheight variation.

Effect of Withdrawal Speed

FIG. 17A shows the relationship between average peak height of LM tracesand withdrawal speed for different line widths and orientations alongwith Equation 4.4 plotted in logarithmic domain. The equation does notconsider the effect of orientation, thus all the theoretical modelpredictions were same between different orientations. Overall, theresults showed a positive correlation between withdrawal speed and thedeposited LM height independent from orientation and line width. As thewithdrawal speed increased, an increasing slope in the logarithmicdomain approaching to the slope of Equation 4.4 for line widths of 100micrometers and 200 micrometers at 300 mm/s withdrawal speed wasobserved. Referring to Equation 4.4, this slope was equal to ⅓ and wasthe exponent value of capillary number. For relatively larger withdrawalspeeds (>about 10 mm/s), a clear log-linear trend was observed betweenpeak height and withdrawal speed. The slope of this trend wasqualitatively similar to that of the theoretical model. The slope valueswere estimated from the experimental data using linear regression foreach line width and orientation combination in this relatively largewithdrawal speed regime (>10 mm/s) and were reported in Table A.3. Thetable shows that the slopes estimated for line widths of 100 micrometersand 200 micrometers were in the range of 0.26-0.31 and very close to theexponent value of capillary number (⅓) in Equation 4.4. The slope valuesestimated for 50 micrometer line width, however, were significantlylower in all orientations (0.2 and lower). Hence, at this length scalethe sensitivity of deposited LM height with respect to withdrawal speedwas much lower.

Referring to FIG. 17A, two deviations from Equation 4.4 were observed.The first was the diminished effect of withdrawal speed on average peakheight for smaller withdrawal speeds (<about 10 mm/s), especially fororientations of 0 and 45 degrees. In this regime the average peak heightseemed to be converging to a constant value as the withdrawal speed goesto 0. This constant value also seemed to depend on the line width. Inlow withdrawal speeds (or low capillary numbers) the effect of viscousforces become negligible and van der Waals interactions or surfaceroughness/topology become the dominant factor. Another dip-coatingsystem where a similar behavior was observed was where surfactants werepresent. The presence of surfactants changes the boundary conditions atthe liquid surface, resulting in deviations from Equation 4.4, wheresuch boundary conditions were not considered in its derivation. Here,the NaOH layer may be acting similar to a surfactant by changing thesurface properties and the boundary conditions of LM. Furthermore, theratio of the deposition height to the dominant length scale was reportedas a constant value in the literature. Using the data shown in FIG. 17Afor orientations of 0 and 45 degrees, the average peak height to widthratios for this regime, where withdrawal speeds are smaller than 10mm/s, and reported in Table A.4. An average constant ratio of0.0267±0.0038 was found for this regime. Without wishing to be bound toany particular theory, it is believed that the behavior was not due tovan der Waals forces. Considering the finite thickness and wrinkling ofthe copper wetting layer shown in FIG. 36B with an amplitude range of100-350 nanometers (see FIG. 36A), and the presence of NaOH layer, thereason behind this behavior may be the combination of surface topologyand the effects due to the presence of NaOH layer.

The second deviation from Equation 4.4 presented itself in the highwithdrawal speeds (larger than 10 mm/s) where the slope was similar butwith a vertical offset in the values. This vertical offset could againbe a consequence of the surfactant's boundary effects and/or theinertial effects. The inertial effects become apparent if the Reynolds(Re=ρUh_(p)/γ) number becomes larger than 1. Here, this regimecorresponded to withdrawal speeds of 75 mm/s and larger for allorientations and line widths assuming the material parameters given inSection 4.2 for EGaIn. Without wishing to be bound to any particulartheory, considering also the presence of NaOH layer, this verticaloffset may be attributed to the combination of these two effects.

As shown in FIG. 18 , no clear trend was observed between heightvariation along a line vs the withdrawal speed. Since the average peakheight along a line increased with the increasing withdrawal speed thepercent variation of the height decreased with the increased withdrawalspeed. These results indicated that higher withdrawal speeds may be moredesirable to obtain more uniform LM features.

Effect of Line Width

The relationship between average peak height of LM traces and line widthfor different withdrawal speeds and orientations along with Equation 4.4are shown in FIG. 17B. In general, a log-linear trend between line widthand average peak height for all withdrawal speeds and orientations. Thisobserved log-linear trend was similar to the trend predicted by Equation4.4. When the slope values were estimated from the experimental datausing linear regression for each withdrawal speed and orientationcombination, it was observed that the slope value changes in rangebetween about 0.8 and about 1.15. These values were close to the slopeof Equation 4.4 (which is 1). Even though the theoretical model capturedthe general trend, a vertical offset in the absolute values predicted bythe model was apparent. Since Equation 4.4 did not consider the effectof orientation, the amount of vertical offset increased as theorientation parameter increased.

FIG. 18B shows the dependence of height variation along a line for LMtraces to line width for different withdrawal speeds and orientations.According to the FIG. 18B, the height variation within a line increasedwith the increasing line width, overall.

Effect of Orientation

FIG. 17C shows the relationship between peak height of LM traces and theorientation of wetting layer geometry with respect to dipping directionfor different line widths and withdrawal speeds. Since the theoreticalmodel given in Equation 4.4 did not consider the effect of orientation,the theoretical predictions were not plotted in this figure. Despite thestatistically significant effect of orientation found in ANOVA analysis,the dependence of deposited LM height on orientation was not uniform asshown in the figure. According to the experimental data, the dependenceon orientation was rather weak for 0 and 45 degrees. A slight differenceat the average peak height only at the highest withdrawal speed (300mm/s) was observed. This plateau region may be highly advantageous forLM patterning purposes since the film thickness may be rather uniformacross a broad range of angles. When the line orientation was 90degrees, however, a thicker LM film was observed for all line widths andwithdrawal speeds. Considering the dependence of the LM peak height onthe line width, a sample withdrawn at an orientation of 0 may behave asa line with an effective width of about W/cos Θ with respect to dippingaxis. This larger width was expected to result in more liquid depositionon the substrate.

Referring to FIG. 18C, no clear trend was observed between theorientation parameter and the variation of the deposited LM peakheights. This qualitative observation was in agreement with the ANOVAresults.

Semi-Empirical Modeling

The analytical model given in Equation 4.4 relates withdrawal speed andline width to the coating height. As discussed above, however, Equation4.4 heavily underpredicted the experimental results (as shown in FIG. 17). Moreover, Equation 4.4 did not consider the diminishing effect ofwithdrawal speed in low capillary numbers and the effect of lineorientation with respect to dipping axis. To capture the effects of linewidth, orientation and withdrawal speed on LM height, two differentmodels may be considered: (1) a linear regression model, and (2) anonlinear semi-empirical model. Considering the ANOVA results, all theparameters and their interactions in the linear regression model wereused. The equation for linear regression model may be represented ash _(p)=α₀+α₁ W+α ₂θ+α₃ U+α ₄ Wθ+α ₅ WU+α ₆ Uθ+α ₇ WUθ  (4.5)h _(p)=α₀+α₁ W+α ₂θ+α₃ U+α ₄ Wθ+α ₅ WU+α ₆ Uθ+α ₇ WUθ  (4.5)where α_(i) were the calibration coefficients, and the units of h_(p),W, U and Θ were micrometers, micrometers, m/s and radians, respectively.

The second model may be represented ash _(p) =K ₀ W _(eff) ^(α) +K ₂ W _(eff) ^(α) U ^(β)  (4.6)where K₀, K₂, α and β were calibration coefficients and W_(eff) waseffective line width. Note that the first term in the summation modeledthe behavior in the very low withdrawal speed region where the depositedliquid metal height seemed to only depend on the line width andorientation as discussed above. The second term, on the other hand, hada similar form to Equation 4.4 and modeled the process behavior in thehigh withdrawal speeds. The coefficients K₀ and K₂ defines the relativeimportance of these two terms. The effective line width W_(eff) took theeffect of orientation into account and defined asW _(eff) =W(2−K ₁ cos θ)  (4.7)where K1 was also a calibration coefficient that defines thecontribution of orientation to the effective width. This form for theeffective width may be used instead of W/cos Θ, since cos Θ went to zeroas Θ went to 90 degrees and created a mathematical singularity.

The experimental data reported in FIG. 17 used to calibrate these twomodels. For the first model (Equation 4.5), linear regression wasemployed while non-linear regression was used to calibrate thecoefficients for the second model (Equation 4.6). The coefficients foundfor these two models were reported in Table 4.

TABLE 4 Calibration coefficients found for two models (Equations 4.5 and4.6) using experimental data. Linear Model Non-linear Model (Model 1)(Model 2) Coefficient Value Coefficient Value α₀ 1.3427 K₀ 0.0092 α₁0.018 K₁ 1.0083 α₂ −3.4195 K₂ 0.0388 α₃ −1.4625 α 1.1747 α₄ 0.202 β0.428 α₅ 0.0376 α₆ −6.5369 α₇ 0.1468Referring to the coefficients found for Model 2, the coefficient of cosΘ term (K1) was found very close to 1. This suggested the form ofW_(eff) about W(2−cos Θ). Furthermore, the exponents of width term (α)and withdrawal speed (β) were found as 1.1747 and 0.428, respectively.These exponents compared fairly well with the exponents of thetheoretical model (given by Equation 4.4) which were 1 and ⅓,respectively. The deviations from the exponents of Equation 4.4 may beattributed to the additional effects included in Model 2 given byEquation 4.6.

TABLE 4.5 Parameters used for model validation. Parameters LevelsOrientation (deg) 15, 30, 75 Line Width (um) 75, 150, 250 WithdrawalSpeed 50, 125, 225 (mm/s)

The predictions for both models were plotted with experimental data asshown in FIG. 19A. The figure shows that both models performed muchbetter compared to the basic theoretical model (Equation 4.4). Betweenthe two empirical models presented above, non-linear semi-empiricalmodel seemed to capture the trend observed in the experimental dataqualitatively better than the linear regression model, except for 50micrometers line width and 0 orientation. In this particular case,linear regression model performed slightly better. Without wishing to bebound to any particular theory, the reason for this deviation may be dueto the significantly lower sensitivity of peak height to withdrawalspeed for 50 micrometers line width at 0 degree orientation discussedabove. The experimental results for this parameter combination did notfollow the same trend with the rest of the parameters. For a morequantitative comparison, root mean squared error (RMSE) between theexperimental data and the model predictions was calculated for eachmodel. RMSE values were found as 2.074 micrometers and 1.302 micrometersfor Model 1 and 2, respectively.

Another set of measurements were conducted using the parameter setreported in Table 5. The orientation and withdrawal speeds used in thisset were selected within the parameter range described above. Two of theline widths, line widths of 75 micrometers and 150 micrometers, werealso selected within this range to be used for validation purposes. Athird line width, 250 micrometers, was investigated to evaluate theextrapolation performance of the models.

The predictions for both models were plotted with validation andextrapolation data as shown in FIG. 19B. The prediction of Model 2 wasin good agreement with both validation and extrapolation data and theagreement was better overall compared to Model 1. Similar to the case of50 micrometers and 0 degree orientation, Model 2 underpredicted the peakheight for 75 micrometers and 0 degree orientation slightly more thanModel 1. Moreover, both models underpredicted the peak height value for250 micrometers at the orientation of 75 degrees and the withdrawalspeed of 225 mm/s. Since 250 micrometers was outside range of the dataset used to tune the calibration coefficients, this deviation was notsurprising. For a quantitative comparison, RMSE values were found as1.34 micrometers and 1.06 micrometers for Model 1 and 2, respectively,for the validation data. For the extrapolation data, the RMSE valueswere found as 5.14 micrometers and 3.68 micrometers for Model 1 and 2,respectively. Overall, these results show that Equation 4.6 could beused for the prediction of deposited LM geometry given the parameters.

Variation in Liquid Metal Dip-Coating

In order to quantify the variation in the liquid metal dip-coatingprocess, we conducted a statistical analysis on the two process outputswe considered: average peak height and peak height variation. For thisanalysis, 30 samples that only included a single line with 100micrometers width and an orientation of 45 degrees with respect todipping axis were used. All the samples were dip-coated with awithdrawal speed of 75 mm/s. The surface profiles of the LM patternswere measured using white light interferometry, and the average peakheight and peak height variation for these samples were computed in thesame way reported in the previous sections.

FIG. 20 provides the histograms and empirical cumulative distributionfunctions for the process outputs along with normal distribution curvefits. Kolmogorov-Smirnov test indicated that the distributions for bothprocess outputs followed normal distributions with a p-value smallerthan 0.05. Normal distributions suggested that there was no systematicerror source and the observed variations were random in nature. Havingnormal distributions was also a fundamental assumption for ANOVAanalysis and the results shown here assured validity of the ANOVAresults provided in above. Lastly, for the line width of 100micrometers, orientation of 45 degrees and withdrawal speed 75 mm/s, theaverage peak height was found as 6.42±0.42 μm while the peak heightvariation was found as 1.06±0.46 micrometers. Referring to FIGS. 17 and18 , these values were in agreement with the experimental resultsmentioned in the previous sections for these parameters.

Example 3

Materials

The substrate material used in the fabrication of demonstration circuitsand test samples was polydimethyl-siloxane (PDMS). It was prepared withSylgard 184 (Dow Corning, USA) using a 10:1 oligomer to curing agentratio. A 3% w/v NaOH solution was prepared by diluting 30% w/v NaOHsolution (BDH Chemicals) with deionized water (100%, McMaster-Carr,USA). Deionized water (DI water) and isopropyl alcohol (IPA) (2-PropanolACS 99.5% min, Alfa Aesar, USA) were used to the clean surface ofsamples after liquid metal deposition and HCl vapor treatment. Eutecticgallium-indium alloy was prepared by mixing Ga (Gallium Source, USA) andIn (Gallium Source, USA) at a 75.5:24.5 ratio by mass and heating andhomogenizing at 190° C. on a hot plate overnight for 12 hours. HCl vaporwas obtained from a one-gallon bottle of 36% w/w aqueous HCl solution(Alfa Aesar, USA).

LM Dip-Coating Setup

FIG. 20 shows the setup used in the wafer-scale dipping experiments. Thesetup consisted of two stages that move in a synchronized fashion toaccommodate the range required for dipping 4-inch wafer. The bath thatcontains 3% w/v NaOH treated EGaIn was attached to a 5-axis stage(AI-TRI-HR4, ALIO Industries, USA). The rotational axes on this stagehave not been employed. The sample holder was attached to another stagethat has only a single axis (BMS60, Aerotech Inc, USA). The verticalaxes of the two stages were used in the dipping while the horizontalaxes of 5-axis stage was used for centering the sample with respect tothe bath. The sample holder, the bath and the bath attachment were3D-printed (Objet30, Stratasys, USA). The experimental setup mayaccommodate constant withdrawal speeds up to 300 mm/s along an about 40mm vertical dipping range and 100 mm/s along about 110 mm while carryingthe EGaIn bath.

Fabrication of Scalable Liquid Metal Circuits

A 4-inch single-crystal silicon wafer was cleaned by rinsing withacetone and IPA and blow dried with nitrogen. Then the silicon wafer wassurface treated with four drops of trichloro(1H,1H,2H,2H-perfluorooctyl)silane (TFOCS, purchased from Sigma Aldrich, USA) under vacuum for 45minutes for easy removal of PDMS in the final step. TFOCS vaporizes anddeposits as a monolayer through siloxane bonding. Next, the siliconwafer was spin coated with PDMS (base and curing agent 10:1 weightratio, Sylgard 184, Dow Corning, USA) at 800 rpm for 30 s and cured on ahotplate at 60° C. for 8 hours. Next, a 150 nanometer layer of Cuadhesion material was sputter deposited (30 W power, 5 mTorr pressure;Perkin-Elmer 8L, USA) on the PDMS substrate along with a 20 nanometer Cradhesion material (30 W power, 20 mTorr pressure). Positive photoresistwas spin coated on Cu surface at 4000 rpm for 30 sec with a spreadingrun at 600 rpm for 6 sec (AZ 4210, Microchemicals, Germany) resulting ina thickness of about 2.1 nanometer. Next, the photoresist was left todry for 24 hours at room temperature since baking cracks metal andphotoresist layers due to thermal expansion coefficient mismatch betweenlayers. The substrate was exposed to UV light using a contact maskaligner (MA6, Suss Microtec, Germany) for 170 seconds (UV300 filter, 320nanometer at 5 mW/cm²) through a transparency mask containing thedesired circuit design (purchased from CAD/Art Services Inc, USA).Following the exposure the photoresist was developed for 1.5 minutes (AZDeveloper 1:1 ratio, AZ Electronic Materials, Luxembourg). The substratewas exposed to UV light using a contact mask aligner for 400 secondswithout a mask (i.e. flood exposure) (UV300 filter, 320 nanometer at 5mW/cm²). Next, Cu and Cr layers were wet etched. The Cu layer was wetetched for 120 seconds using a 1:15 volume ratio of Cu etchant (APS-100Copper Etchant, Transene Company Inc, USA) to DI water solution.Likewise, the Cr layer was wet etched for 90 seconds using a 1:10 volumeratio of Cr etchant (Chromium Cermet Etchant TFE, Transene Company Inc,USA) to DI water solution. The photoresist mask was then stripped off byimmersing the substrate into photoresist developer for 1.5 minutes (AZDeveloper 1:1 ratio). The stripping was done using the photoresistdeveloper since acetone swells PDMS and results in cracks in the metalfeatures. Finally, the substrate was attached to the dip-coatingexperimental setup and immersed into 3% w/v NaOH treated EGaIn bath witha constant speed of 0.16 mm/s. It was then kept in the bath for about 60seconds to let the LM wet to the copper surface and then withdrawn fromthe bath with 1 mm/s constant speed. Following the dip-coating the EGaIncoated substrate was immersed horizontally into DI water and IPA toclean residual NaOH and then dried on a hotplate at 60° C. for 10minutes. In the circuit designs with rigid components (i.e., an ultrahigh frequency (UHF) radio-frequency identification (RFID) patch) therigid circuit components were inserted in their designated places. Next,HCl vapor was applied to the sample surfaces. HCl vapor was obtainedfrom 36% w/w aqueous HCl bottle. HCl treated samples were immersed intoDI water and IPA and then dried on a hotplate at 60° C. for 10 min. Thenthe sample was oxygen plasma treated with 30 W and 45 seconds toactivate PDMS surface (Plasma Prep 3, SPI, USA). Then liquid PDMS waspoured over the surface, and the sample was degassed under vacuum for 30minutes. Lastly, the sample was cured on a hotplate at 60° C. for 8hours.

Characterization of Liquid Metal Capacitors

The printed EGaIn geometries were measured with a white lightinterferometer (using NewView, Zygo, USA). The obtained geometrical datawere processed in MATLAB along with statistical analysis and modeling.The capacitance values were measured with an LCR meter (889B, BKPrecision, USA) at 1 V level and 200 kHz frequency (values wererecommended by LCR meter datasheet).

Implementation and Testing of Liquid Metal UHF Patches

The circuit designs for the stretchable liquid metal ultra-highfrequency patches are shown in FIG. 22 and were made in CircuitMaker(Altium Limited, Australia). Referring to FIG. 23 , rigid chips wereplaced using a custom made manual pick and place setup. After thepatches were fabricated, they were cut in the desired shape and peeledfrom the Si wafer backing layer. For easy attachment of the patches tothe materials tester's grippers during tensile testing the fabricatedUHF RFID patches were embedded in larger PDMS sheets. First, a sheet ofPDMS was half-cured in a mold at 60° C. for 10 minutes. The patch wasthen oxygen-plasma activated and placed on half-cured PDMS. Then it wassealed by pouring and curing another PDMS layer. The final thickness ofthe samples was about 1.5 mm. Tensile testing was performed on acommercial material testing device (5969 Dual Column Testing System,Instron, USA). During the test, the load and displacement of the samplesalong with the voltage on the strain gauge sensor were measuredsimultaneously. Load and displacement were measured by using a dataacquisition board (NI USB-6002, National Instruments, USA) connected tothe material testing system and transmitted to the data collectioncomputer. The strain gauge reading and the temperature was measured bythe UHF chip and transmitted to the computer using an RFID reader (M6EEmbedded RFID Reader Module, ThingMagic Inc, USA) operating in “NorthAmerica” frequency band (902-928 MHz). The displacement rate for thetesting was 80 mm/s. The temperature sensor on the patch wascharacterized using a hot plate (HS40, Torrey Pines Scientific Inc,USA). All data processing and visualization were done in MATLAB (R2016b,MathWorks, USA).

Results and Discussion

Fabrication Flow

FIG. 24A shows a schematic diagram of the proposed liquid metal circuitfabrication method. The workflow for circuit fabrication comprises: (i)fabrication of copper wetting layer on an elastomer substrate, which isspin-coated on an Si wafer, using photolithography, (ii) liquid metaldeposition through dip-coating, (iii) microelectronic componentplacement and interfacing, and (iv) elastomer sealing. The fabricationprocess starts with spin coating and curing of PDMS (Dow, Sylgard 184;10:1 base-to-curing agent weight ratio) on a silanized 100 mm (4-inch)silicon wafer. Next, 20 nanometer thick Cr and 150 nanometer thick Cuare sputter deposited on the PDMS substrate. Cr is used to improve theadhesion between PDMS and Cu. Then a positive photoresist layer is spincoated and patterned using photolithography. Next Cu and Cr layers arewet etched to obtain the LM wetting layer for the desired circuitgeometry. Following wet etching, the photoresist layer is stripped offfrom the metal surface. After the desired wetting layer geometry isobtained, the substrate is coated with LM by dipping it into a 3% w/vsodium hydroxide (NaOH) treated EGaIn bath using a custom experimentalsetup shown in FIG. 21 . This may form the liquid metal trace. Theexperimental setup provides consistency for the LM dip-coating step byproviding consistent immersion and withdrawal speeds as well as keepingthe sample inside the bath for a specified amount of time. The dippingbath includes two immiscible layers: aqueous NaOH solution and EGaIn.The amount of EGaIn in the bath is sufficient to immerse the entirewafer. A thin layer of aqueous NaOH solution (3% w/v) floats on top ofEGaIn to ensure removal of oxide from both the Cu wetting layer and theEGaIn, and to facilitate selective wetting of LM to the wetting layer onsubstrate. Keeping the sample inside the bath for a specified amount oftime allows LM to completely wet the copper patterns. Dry spots on thewetting layer may form when the amount of time the substrate is keptinside the LM bath is too short. After LM coating, the sample isimmersed horizontally into DI water and IPA to clean residual NaOH,respectively and then dried on a hot plate. This may form the liquidmetal trace. Next, rigid components (if desired) are placed on thedesignated locations (e.g., on the liquid metal trace) and HCl vapor isapplied to the component pins to create a low contact resistanceelectrical interface between the pins and LM interconnects. HCl treatedsamples are then immersed into deionized (DI) water and isopropylalcohol (IPA) for cleaning and then dried on a hotplate at 60° C. for 10min. Then, the sample surface is activated with oxygen plasma treatmentand the sample is sealed by curing another layer of PDMS over thesurface. The completed circuits are then peeled from the Si wafer.

Characterization of Liquid Metal Geometries

Representative images of a capacitor on the PDMS-coated wafer are shownin FIGS. 25A and 25B, before and after EGaIn deposition, respectively.The width of each capacitor finger is 200 micrometers with afinger-to-finger distance of 200 micrometers. The length of each fingeris 5 mm and there are 10 pairs of fingers. The contact pads have adimension of 1 mm by 1 mm. To evaluate geometrical repeatability, theprofiles of capacitor fingers were measured using white lightinterferometry for all capacitors. To evaluate electrical repeatability,the capacitance of each capacitor was measured with an LCR meter. Intotal, four 4-inch wafer samples, each containing 31 LM capacitors, werefabricated with the same dip-coating parameters (see FIG. 24B). Thelayout of capacitors on the wafer is shown in FIG. 25C along with thedirection of withdrawal from the EGaIn bath.

Geometrical and Electrical Results

FIG. 25D shows contour plots for the average finger peak height, thestandard deviation in the finger peak heights, and the capacitancevalues for each capacitor on one of the wafers. The contour plots forall four wafers are shown in FIG. 26 . Each pixel of each contour plotcorresponds to a capacitor and the colors correspond to either of theaverage finger height, standard deviation in the finger peak height orthe capacitance. Note that white pixels on the corners are the pixelswhere there are no capacitors. The average finger peak height and thestandard deviation in the finger peak heights per capacitor werecalculated as follows: the surface profile of each finger on a capacitorwas measured along the longitudinal axis of the finger (x-axis shown inFIG. 27B) leaving about 300 micrometers from both ends. Then the averageof the peak points of y-axis cross-sections along finger length werecomputed for each finger. The mean and standard deviation of the averagepeak heights of 20 fingers are given in the contour plots. FIG. 27Ashows the profile measurements of all fingers along the x-axis plottedon top of each other for the representative LM capacitor given in FIG.27B. The inset shows a close-up view of the first finger profile.Referring back to FIG. 25 and FIG. 26 , no clear spatial trend on themeasured values was observed within the wafers. The peak height standarddeviation within each LM capacitor was found to be less than 2micrometers.

FIG. 27C shows the average peak height for each finger. Although withinthe error bands, we observed variations in peak heights between adjacentfingers from these results. Referring to FIG. 27C, the odd-numberedfingers appear to have slightly shorter peak heights on average than theeven-numbered fingers do. Statistical evaluation of the peak heightdistributions of even- and odd-numbered fingers using Kolmogorov-Smirnovtwo-sample test revealed that the observed height difference wasstatistically significant (with a p-value smaller than 0.05) both wheneach wafer was tested separately and when all wafers tested together.Furthermore, when the peak heights of the fingers at the edges (fingers1-3 and 18-20) were compared with those of the fingers at the center(fingers 8-12), a statistically significant (p<0.05) height differencewas observed, independent from fingers being odd- or even-numbered.These results show that the amount of deposited LM may be affected(albeit slightly) by the interaction of wetting layer geometry and thewithdrawal direction. Lastly, those differences in peak heights,depending on where each finger is, may account for some of the observedpeak height standard deviation within each LM capacitor.

FIG. 27D shows the distribution of average peak height, peak heightstandard deviation, and capacitance values of capacitors within eachwafer. The mean and standard deviation of the given contour plots were13.13±1.18 micrometers for average peak height, 1.25±0.31 micrometersfor peak height standard deviation and 2.78±0.05 pF for capacitance.Shapiro-Wilk normality test with 95% confidence interval was applied tounderstand if the measured geometrical and electrical values of thecapacitors within each wafer followed a normal distribution. For averagepeak height all wafers except for wafer number 2 was found to havenormal distributions. In terms of peak height standard deviation allwafers except wafer 4 was found to have normal distributions. Lastly,all wafers were found to follow a normal distribution for capacitancevalues.

Referring to FIG. 27D, no statistically significant difference betweenwafers was observed in terms of average peak height. The average peakheight values were 13.13±1.18 micrometers, 12.83±1.94 micrometers and13.48±1.86 micrometers for wafers 1, 3, and 4, respectively. Since wafer2 did not follow a normal distribution we report the minimum, median andmaximum average peak height values as 10.72 micrometers, 12.48micrometers and 15.1 micrometers, respectively. Hence the geometricalrepeatability was better than about 14% for the given processconditions. Considering the well-established rigid PCB manufacturingtolerances on thickness are ±10%, these results show potential forrepeatable and reproducible manufacturing of LM-based electronicsscalably. For peak height standard deviation statistical testingrevealed that the peak height standard deviation measured for wafer 1was different from that for wafers 3 and 4 (statistically significantwith 95% confidence interval). The peak height standard deviation valuesfor wafers 1, 2 and 3 were 1.25±0.31 micrometers, 1.35±0.27 micrometers,1.52±0.31 micrometers, respectively. For wafer 4, which did not follow anormal distribution, the minimum, median and maximum peak heightstandard deviations are 0.9 micrometers, 1.41 micrometers and 1.8micrometers, respectively. In general, the standard deviations werebelow 2 micrometers and in agreement with the variations seen in averagepeak height values. Lastly, the average capacitance values for sampleswere found as 2.78±0.05 pF, 2.62±0.05 pF, 2.67±0.09 pF, 2.63±0.05 pF,respectively. No statistically significant difference between wafers wasobserved for capacitance measurements except for wafer 1. Wafer 1 had aslightly higher mean capacitance value compared to the other wafers.Considering that wafer 1 had the lowest average geometrical variations,this higher average capacitance value of wafer 1 may be attributed tothe smaller variations. Smaller geometrical variations likely result ina slightly better overlap between capacitor fingers and increase in thecapacitance values. Overall, the LM deposition with dip-coating processresulted in consistent geometries and electrical properties within thesame wafer and between different wafers. These results suggest that LMdip-coating is promising as a method for repeatable and reproduciblemass manufacturing of LM circuits.

Demo Circuit Implementations

To demonstrate the versatility of the proposed method, a stretchable LMhybrid UHF RFID patch was designed and fabricated as shown in FIGS. 24Dand 28A. The UHF patch design included interconnects, a resistive straingage and a UHF dipole antenna made of LM, and microelectronicscomponents such as a tuning inductor and a UHF RFID chip (SL900A, AMSAG, Austria). The compact antenna design operated in the UHF band(860-960 MHz) to be used with EGaIn. The RFID chip used the EPCglobalClass 3 air interfacing protocol and contains an on-board 10-bitanalog-to-digital converter (ADC). The design and the dimensions of thepatch are given in FIG. 22 . The LM UHF patch worked in a passive(battery-free) mode via power harvesting from RFID reader magnetic fieldand included a temperature sensor and a strain gauge. FIG. 28A showsfour LM UHF patches successfully fabricated on a 4-inch Si wafer backinglayer. The inset on the top left of the figure shows the connectionbetween the UHF chip, tuning inductor, strain gage and antenna. Thetemperature sensor was embedded in the RFID chip while the resistivestrain gage was made of a serpentine LM trace and connected to the ADCchannel of the chip. The inset images on the top right and bottom rightof FIG. 28A show the LM resistive strain gage on the patch. The linewidth and gap between lines on the strain gage was 130 micrometers whilethe total length and width of the strain gage are 11 mm and 8.2 mm,respectively. The sensor readings obtained from the patch weretransmitted to an external computer wirelessly via an RFID reader (M6E,ThingMagic Inc, USA).

A set of tensile tests were conducted to quantify the electromechanicalbehavior of the resistive strain gage on the patch. The electricalresponse of the strain gage and the strain applied on the patch weresimultaneously recorded during tensile loading. In order to properlyattach the UHF patches to the materials testing system, they wereembedded in a larger piece of PDMS (see FIG. 28B). Four samples (allfrom the same wafer) were tested them up to 30% strain. The results ofthis test are summarized in FIG. 28C along with the theoreticalpredictions (shown with dashed lines) based on Ohm's law and assuming novolume change during deformation (incompressible materials). Thetheoretical prediction for the normalized resistance change of thestrain gauge may be expressed as

$\begin{matrix}{\frac{\Delta R}{R_{0}} = {\lambda^{2} - 1}} & (1)\end{matrix}$where λ is L/L₀, and L and L₀ are the instantaneous length andunstretched length of strain gage, respectively. Referring to FIG. 28C,the theory and experimental results generally agreed, as well asconsistent resistance vs. strain behavior between different patches. Theslight deviation between the theory and experimental results is likelydue to the change in contact resistance between the chip pins and the LMstrain gage under deformation.

As shown in FIGS. 28D and 28E, the strain gage showed a reversiblebehavior for various amounts of deformation with negligible hysteresis.The patch was attached onto the wrist portion of a spandex glove with asilicone glue (Sil-Poxy, Smooth-on Inc., US) and obtained real-time datafrom the strain sensor induced by deformations of the device while theglove was worn. FIG. 28G show the signal obtained by the patchassociated with wrist flexion and release for the device mounted on thespandex glove.

The samples were loaded uniaxially up to failure (FIG. 28B), failureoccurred at the LM-component-elastomer interface. This failure locationmay be caused by the strain concentration at the circuitcomponent/elastomer interfaces, as observed before by us and others.Lastly, the strain at failure was about 40% (38.8±3.2%) strain.

Next, the temperature sensor on the patch (integrated in the RFID chip)was characterized to demonstrate that it would operate within itsspecifications while mounted on a LM circuit. For this experiment, foursamples from a single wafer were used. Each LM patch was placed directlyat the center surface of a precision hot plate (HS40, Torrey PinesScientific Inc, USA) and their temperatures were measured wirelessly. Atthe same time, the temperature of the hot plate was also recorded. Thesamples were tested between a range of 21° C. to 75° C. in 5° C.increments except for a 4° C. increment between 21° C. and 25° C. 15minutes elapsed between each data recording to ensure that thetemperature had reached equilibrium. As shown in FIG. 28F, the sensorclosely followed the hot plate temperature up to 75° C. even though itwas rated up to 58° C. by the manufacturer. The slight deviation after65° C. was likely due to the fact that these temperatures were above thesensor's rated range. FIG. 29 show the real-time temperature measurementobtained from the patch wirelessly. At first, the patch was in roomtemperature at about 23° C. (see the first region in FIG. 29 ). When afinger was placed on the sensor the temperature rose to about 36° C.within about 25 seconds (the second region in FIG. 29 ). Next, thefinger was removed and the measured temperature started to decreasetowards the room temperature (the third region in FIG. 29 ). Lastly,bending and stretching was applied to the soft patch and observed thatmechanical deformation created a slight noise in the readings withinabout 1.5° C. due to antenna deformation. As a result of thesemeasurements, it is believed that the temperature sensor operatedproperly and may be used reliably in LM based RFID circuits. Althoughother circuit implementations may be possible with this technique, theLM UHF patch demonstrated here adequately captures the scalablefabrication capability of the proposed method in making multifunctionalsoft and stretchable electrical circuits with integratedmicroelectronics.

The present invention is directed to the following aspects:

Aspect 1. A high-throughput method of manufacturing a liquid metalcircuit, the method comprising: applying a liquid metal to an alloyingmetal pattern on an elastic substrate to form the liquid metal circuit,wherein the high-throughput method of manufacturing the liquid metalcircuit is characterized by at least one of wherein the elasticsubstrate comprises a surface area greater than 1 square inch, such asgreater than 10 square inches (e.g., 16 square inches), greater than 100square inches, greater than 144 square inches, greater than 256 squareinches and greater than 400 square inches; and wherein the liquid metalcircuit comprises a plurality of liquid metal circuits on the elasticsubstrate.

Aspect 2. The method of Aspect 1 comprising fabricating the alloyingmetal pattern using at least one of photolithography, stencillithography, chemical etching, and laser micromachining.

Aspect 3. The method of Aspect 1 or Aspect 2 comprising providing apatterned adhesive surface on a surface of the elastic substrate by atleast one of chemical surface modification, mechanical surfacemodification, and applying an adhesion material in a pattern to asurface of the elastic substrate by at least one of photolithography,stencil lithography, sputter deposition, physical vapor deposition, andchemical vapor deposition.

Aspect 4. The method of any of the preceding Aspects comprising applyingan alloying metal material to the patterned adhesive surface by at leastone of photolithography, stencil lithography, chemical etching, lasermicromachining, chemical surface modification of the elastic substrate,and mechanical surface modification of the elastic substrate, whereinthe alloying metal material adheres to the patterned adhesion surface toform the alloying metal pattern on the elastic substrate.

Aspect 5. The method of any of the preceding Aspects, wherein applyingthe liquid metal to the alloying metal pattern comprises exposing thealloying metal pattern to a liquid metal.

Aspect 6. The method of any of the preceding Aspects 5, wherein exposingthe alloying metal pattern to the liquid metal comprises at least one ofrolling the liquid metal, jetting the liquid metal, brushing the liquidmetal, spray deposition, and dipping in a reservoir comprising theliquid metal.

Aspect 7. The method of any of the preceding Aspects, wherein applyingthe liquid metal to the alloying metal pattern comprises liquid-metaldip coating of the alloying metal pattern into a reservoir comprisingthe liquid metal.

Aspect 8. The method of any of the preceding Aspects, wherein thealloying metal pattern is immersed into and removed from the reservoirat a dipping orientation independently selected from up to 90 degreeswith respect to the alloying metal pattern on a surface of the elasticsubstrate, such as 0-90 degrees, greater than zero up to 90 degrees,0-45 degrees, and 45-90 degrees.

Aspect 9. The method of any of the preceding Aspects, wherein thereservoir comprises the liquid metal and an oxide-removing solventcomprising sodium hydroxide, hydrochloric acid, and mixtures thereof.

Aspect 10. The method of any of the preceding Aspects comprisingagitating at least one of the reservoir, the liquid metal, and theelastic substrate when the alloying metal pattern is exposed to theliquid metal.

Aspect 11. The method of any of the preceding Aspects, wherein theliquid metal circuit comprises a liquid metal trace having a height towidth ratio up to 1, such as 0.1-1, 0.25-1, 0.5-1, 0.75-1, 0.1-0.5,0.25-0.75, less than 0.5, less than 0.25, wherein the liquid metal tracecomprises the liquid metal.

Aspect 12. The method of any of the preceding Aspects, wherein theadhesion material comprises at least one of chromium, titanium andnickel, the alloying material comprises at least one of copper, gold,platinum, palladium, tin, zinc, and iridium, and the liquid metalcomprises at least one of gallium, indium, and tin.

Aspect 13. The method of any of the preceding Aspects, wherein theliquid metal circuit comprises a self-healing liquid metal circuit.

Aspect 14. An integrated circuit comprising the liquid metal circuitmanufactured according to any of the preceding Aspects.

Aspect 15. A high-throughput method of manufacturing a liquid metalcircuit, the method comprising: forming a liquid metal trace on anelastic substrate by exposing an alloying metal pattern on the elasticsubstrate to a liquid metal; positioning a microelectronic componentproximate to the liquid metal trace; and exposing the microelectroniccomponent and the liquid metal trace to a solvent gas to remove oxidefrom at least one of the microelectronic component and the liquid metaltrace, wherein the microelectronic component is substantially alignedwith the liquid metal trace after exposing the microelectronic componentand the liquid metal trace to the solvent gas; wherein thehigh-throughput method of manufacturing the liquid metal circuit ischaracterized by at least one of wherein the elastic substrate comprisesa surface area greater than 1 square inch, such as greater than 10square inches, greater than 100 square inches, greater than 144 squareinches, greater than 256 square inches and greater than 400 squareinches; and wherein the liquid metal circuit comprises a plurality ofliquid metal circuits on the elastic substrate.

Aspect 16. The method of any of the preceding Aspects, wherein thesolvent gas comprises at least one of hydrochloric acid, sodiumhydroxide, sulfuric acid, and potassium hydroxide.

Aspect 17. The method of any of the preceding Aspects, wherein themicroelectronic component comprises a vertical distance between themicroelectronic component and the liquid metal trace that is reducedafter exposing the microelectronic component and the liquid metal traceto the solvent gas.

Aspect 18. A high-throughput method of manufacturing a liquid metalcircuit, the method comprising: liquid-metal dip coating an alloyingmetal pattern on an elastic substrate into a reservoir comprising aliquid metal, wherein the high-throughput method of manufacturing theliquid metal circuit is characterized by at least one of wherein theelastic substrate comprises a surface area greater than 1 square inch;and wherein the liquid metal circuit comprises a plurality of liquidmetal circuits on the elastic substrate.

Aspect 19. The method of any of the preceding Aspects, wherein thealloying metal pattern comprises at least one of copper, gold, platinum,palladium, tin, zinc, and iridium, and the liquid metal comprises atleast one of gallium, indium, and tin.

Aspect 20. The method of any of the preceding Aspects, wherein theliquid metal circuit comprises a liquid metal trace having a height towidth ratio up to 1, such as 0.1-1, 0.25-1, 0.5-1, 0.75-1, 0.1-0.5,0.25-0.75, less than 0.5, less than 0.25.

Aspect 21. The method of any of the preceding Aspects, wherein thehigh-throughput method of manufacturing the liquid metal circuit ischaracterized by a manufacturing time up to 1 hour, such as less than 60minutes, less than 30 minutes, less than 15 minutes, less than 10minutes, less than 5 minutes, less than 1 minute, 1-60 seconds and 1-15seconds. For example, the high-throughput method of manufacturing theliquid metal circuit is characterized by at least 100 liquid metalcircuits/minute, such as at least 200, at least 300, at least 400 and atleast 500.

Aspect 22. The method of any of the preceding Aspects, wherein theliquid metal trace has a height of at least 1 micrometer, 2 micrometers,5 micrometers, 10 micrometer, 15 micrometers, 18 micrometers, 20micrometers and 25 micrometers.

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All documents cited herein are incorporated herein by reference, butonly to the extent that the incorporated material does not conflict withexisting definitions, statements, or other documents set forth herein.To the extent that any meaning or definition of a term in this documentconflicts with any meaning or definition of the same term in a documentincorporated by reference, the meaning or definition assigned to thatterm in this document shall govern. The citation of any document is notto be construed as an admission that it is prior art with respect tothis application.

While particular embodiments have been illustrated and described, itwould be obvious to those skilled in the art that various other changesand modifications may be made without departing from the spirit andscope of the invention. Those skilled in the art will recognize or beable to ascertain using no more than routine experimentation, numerousequivalents to the specific apparatuses and methods described herein,including alternatives, variants, additions, deletions, modificationsand substitutions. This application including the appended claims istherefore intended to cover all such changes and modifications that arewithin the scope of this application.

What is claimed is:
 1. A high-throughput method of manufacturing aliquid metal circuit, the method comprising: providing an alloying metalon a circuit pattern on a surface of an elastic substrate to form analloying metal pattern on the elastic substrate; submerging the elasticsubstrate having the alloying metal pattern into a liquid bath for adwell time to alloy the liquid metal with the alloying metal pattern,wherein the liquid bath comprises a top layer of an oxide reducing agentand a bottom layer of a liquid metal in an oxide-free state, and whereinthe alloying metal pattern contacts the oxide reducing agent beforecontacting the liquid metal; and withdrawing the elastic substrate fromthe liquid bath at a removal speed to form the liquid metal circuithaving the circuit pattern defined by the alloying metal pattern and adeposition height correlated with the removal speed, wherein the liquidmetal is not deposited on the elastic substrate at locations lacking thealloying metal pattern, and wherein the liquid metal deposited on thealloying metal pattern contacts the reducing agent immediately prior tocomplete removal of the elastic substrate from the liquid bath.
 2. Themethod of claim 1, wherein providing the alloying metal comprises:depositing the alloying metal on the circuit pattern on the surface ofthe elastic substrate.
 3. The method of claim 1 comprising: fabricatingthe circuit pattern from the alloying metal on the surface of theelastic substrate using photolithography, stencil printing, selectivedeposition, rolling, or contact printing.
 4. The method of claim 1comprising: agitating the liquid bath when submerging the elasticsubstrate.
 5. The method of claim 1 comprising: positioning amicroelectronic component proximate to the liquid metal circuit.
 6. Themethod of claim 1, wherein the removal speed is from 10⁻¹ to 10³ mm/s.7. The method of claim 1, wherein the liquid metal circuit comprises: aheight up to 100 micrometers, a width up to 500 micrometers, and aheight-to-width ratio from 0.1-100.
 8. The method of claim 1, whereinthe liquid metal circuit has a height-to-width ratio from 0.1-100. 9.The method of claim 1, wherein the liquid metal circuit has aheight-to-width ratio from 0.1-1.
 10. The method of claim 1, wherein theremoval speed is from 10⁻¹ to 10³ mm/s, and the liquid metal circuitcomprises a height up to 100 micrometers and a height-to-width ratiofrom 0.1-100.
 11. The method of claim 1, wherein the elastic substratecomprises a surface area greater than 1 square inch.
 12. The method ofclaim 1, wherein the elastic substrate comprises a plurality of theliquid metal circuits.
 13. The method of claim 1, wherein the alloyingmetal is copper, gold, platinum, palladium, tin, zinc, iridium, or anycombinations thereof.
 14. The method of claim 1, wherein the liquidmetal is gallium, indium, tin, or any combinations thereof.
 15. Themethod of claim 1, wherein the liquid metal is a gallium-indium alloy ora gallium-indium-tin alloy.
 16. The method of claim 1, wherein thereducing agent is potassium hydroxide, sodium hydroxide, hydrochloricacid, or any combinations thereof.
 17. A high-throughput method ofmanufacturing a liquid metal circuit, the method comprising: providingan alloying metal on a circuit pattern on a surface of an elasticsubstrate to form an alloying metal pattern on the elastic substrate,wherein the alloying metal is copper, gold, platinum, palladium, tin,zinc, iridium, or any combinations thereof; submerging the elasticsubstrate having the alloying metal pattern into a liquid bath for adwell time to alloy the liquid metal with the alloying metal pattern,wherein the liquid bath comprises a top layer of an oxide reducing agentand a bottom layer of a liquid metal in an oxide-free state, wherein thealloying metal pattern contacts the oxide reducing agent beforecontacting the liquid metal, wherein the reducing agent is potassiumhydroxide, sodium hydroxide, hydrochloric acid, or any combinationsthereof, and wherein the liquid metal is gallium, indium, tin, or anycombinations thereof; and withdrawing the elastic substrate from theliquid bath at a removal speed to form the liquid metal circuit havingthe circuit pattern defined by the alloying metal pattern and adeposition height correlated with the removal speed, wherein the removalspeed is from 10⁻¹ to 10³ mm/s, and the liquid metal circuit comprises aheight up to 100 micrometers and a height-to-width ratio from 0.1-100,wherein the liquid metal is not deposited on the elastic substrate atlocations lacking the alloying metal pattern, wherein the liquid metaldeposited on the alloying metal pattern contacts the reducing agentimmediately prior to complete removal of the elastic substrate from theliquid bath.